NV_CIO_CRE_LCD__INDEX  675 drivers/gpu/drm/nouveau/dispnv04/crtc.c 	crtc_state->CRTC[NV_CIO_CRE_LCD__INDEX] = crtc_saved->CRTC[NV_CIO_CRE_LCD__INDEX];
NV_CIO_CRE_LCD__INDEX  109 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	crtcstate[head].CRTC[NV_CIO_CRE_LCD__INDEX] &=
NV_CIO_CRE_LCD__INDEX  251 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	uint8_t *cr_lcd = &crtcstate[head].CRTC[NV_CIO_CRE_LCD__INDEX];
NV_CIO_CRE_LCD__INDEX  252 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	uint8_t *cr_lcd_oth = &crtcstate[head ^ 1].CRTC[NV_CIO_CRE_LCD__INDEX];
NV_CIO_CRE_LCD__INDEX  271 drivers/gpu/drm/nouveau/dispnv04/dfp.c 					       NV_CIO_CRE_LCD__INDEX,
NV_CIO_CRE_LCD__INDEX  595 drivers/gpu/drm/nouveau/dispnv04/hw.c 	rd_cio_state(dev, head, regp, NV_CIO_CRE_LCD__INDEX);
NV_CIO_CRE_LCD__INDEX  714 drivers/gpu/drm/nouveau/dispnv04/hw.c 	wr_cio_state(dev, head, regp, NV_CIO_CRE_LCD__INDEX);
NV_CIO_CRE_LCD__INDEX  116 drivers/gpu/drm/nouveau/dispnv04/tvnv04.c 	NVWriteVgaCrtc(dev, head, NV_CIO_CRE_LCD__INDEX,
NV_CIO_CRE_LCD__INDEX  117 drivers/gpu/drm/nouveau/dispnv04/tvnv04.c 		       state->CRTC[NV_CIO_CRE_LCD__INDEX]);
NV_CIO_CRE_LCD__INDEX  404 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 							NV_CIO_CRE_LCD__INDEX];