NV_CIO_CRE_HCUR_ADDR1_INDEX   48 drivers/gpu/drm/nouveau/dispnv04/cursor.c 	regp->CRTC[NV_CIO_CRE_HCUR_ADDR1_INDEX] =
NV_CIO_CRE_HCUR_ADDR1_INDEX   51 drivers/gpu/drm/nouveau/dispnv04/cursor.c 		regp->CRTC[NV_CIO_CRE_HCUR_ADDR1_INDEX] |=
NV_CIO_CRE_HCUR_ADDR1_INDEX   56 drivers/gpu/drm/nouveau/dispnv04/cursor.c 	crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_HCUR_ADDR1_INDEX);
NV_CIO_CRE_HCUR_ADDR1_INDEX  615 drivers/gpu/drm/nouveau/dispnv04/hw.c 	rd_cio_state(dev, head, regp, NV_CIO_CRE_HCUR_ADDR1_INDEX);
NV_CIO_CRE_HCUR_ADDR1_INDEX  728 drivers/gpu/drm/nouveau/dispnv04/hw.c 	wr_cio_state(dev, head, regp, NV_CIO_CRE_HCUR_ADDR1_INDEX);
NV_CIO_CRE_HCUR_ADDR1_INDEX  376 drivers/gpu/drm/nouveau/dispnv04/hw.h 		&nv04_display(dev)->mode_reg.crtc_reg[head].CRTC[NV_CIO_CRE_HCUR_ADDR1_INDEX];
NV_CIO_CRE_HCUR_ADDR1_INDEX  382 drivers/gpu/drm/nouveau/dispnv04/hw.h 	NVWriteVgaCrtc(dev, head, NV_CIO_CRE_HCUR_ADDR1_INDEX, *curctl1);