NVReadRAMDAC 714 drivers/gpu/drm/nouveau/dispnv04/crtc.c uint32_t reg900 = NVReadRAMDAC(dev, nv_crtc->index, NV_PRAMDAC_900); NVReadRAMDAC 159 drivers/gpu/drm/nouveau/dispnv04/dac.c saved_rtest_ctrl = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL); NVReadRAMDAC 177 drivers/gpu/drm/nouveau/dispnv04/dac.c saved_rgen_ctrl = NVReadRAMDAC(dev, 0, NV_PRAMDAC_GENERAL_CONTROL); NVReadRAMDAC 259 drivers/gpu/drm/nouveau/dispnv04/dac.c saved_rtest_ctrl = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset); NVReadRAMDAC 280 drivers/gpu/drm/nouveau/dispnv04/dac.c saved_routput = NVReadRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset); NVReadRAMDAC 300 drivers/gpu/drm/nouveau/dispnv04/dac.c temp = NVReadRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset); NVReadRAMDAC 305 drivers/gpu/drm/nouveau/dispnv04/dac.c temp = NVReadRAMDAC(dev, head, NV_PRAMDAC_TEST_CONTROL); NVReadRAMDAC 310 drivers/gpu/drm/nouveau/dispnv04/dac.c sample = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset); NVReadRAMDAC 312 drivers/gpu/drm/nouveau/dispnv04/dac.c sample &= NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset); NVReadRAMDAC 314 drivers/gpu/drm/nouveau/dispnv04/dac.c temp = NVReadRAMDAC(dev, head, NV_PRAMDAC_TEST_CONTROL); NVReadRAMDAC 398 drivers/gpu/drm/nouveau/dispnv04/dac.c otherdac = NVReadRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + dac_offset); NVReadRAMDAC 433 drivers/gpu/drm/nouveau/dispnv04/dac.c uint32_t dacclk = NVReadRAMDAC(dev, 0, dacclk_off); NVReadRAMDAC 480 drivers/gpu/drm/nouveau/dispnv04/dac.c nv_encoder->restore.output = NVReadRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + NVReadRAMDAC 65 drivers/gpu/drm/nouveau/dispnv04/dfp.c return ((NVReadRAMDAC(dev, ramdac, NV_PRAMDAC_FP_TMDS_DATA) & 0x8) >> 3) ^ ramdac; NVReadRAMDAC 97 drivers/gpu/drm/nouveau/dispnv04/dfp.c if (NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL) & NVReadRAMDAC 464 drivers/gpu/drm/nouveau/dispnv04/dfp.c NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL); NVReadRAMDAC 554 drivers/gpu/drm/nouveau/dispnv04/dfp.c nv04_display(dev)->mode_reg.sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK); NVReadRAMDAC 187 drivers/gpu/drm/nouveau/dispnv04/hw.c uint32_t ramdac580 = NVReadRAMDAC(dev, 0, NV_PRAMDAC_580); NVReadRAMDAC 399 drivers/gpu/drm/nouveau/dispnv04/hw.c regp->nv10_cursync = NVReadRAMDAC(dev, head, NV_RAMDAC_NV10_CURSYNC); NVReadRAMDAC 402 drivers/gpu/drm/nouveau/dispnv04/hw.c state->pllsel = NVReadRAMDAC(dev, 0, NV_PRAMDAC_PLL_COEFF_SELECT); NVReadRAMDAC 404 drivers/gpu/drm/nouveau/dispnv04/hw.c state->sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK); NVReadRAMDAC 406 drivers/gpu/drm/nouveau/dispnv04/hw.c regp->dither = NVReadRAMDAC(dev, head, NV_RAMDAC_DITHER_NV11); NVReadRAMDAC 408 drivers/gpu/drm/nouveau/dispnv04/hw.c regp->ramdac_gen_ctrl = NVReadRAMDAC(dev, head, NV_PRAMDAC_GENERAL_CONTROL); NVReadRAMDAC 411 drivers/gpu/drm/nouveau/dispnv04/hw.c regp->ramdac_630 = NVReadRAMDAC(dev, head, NV_PRAMDAC_630); NVReadRAMDAC 413 drivers/gpu/drm/nouveau/dispnv04/hw.c regp->ramdac_634 = NVReadRAMDAC(dev, head, NV_PRAMDAC_634); NVReadRAMDAC 415 drivers/gpu/drm/nouveau/dispnv04/hw.c regp->tv_setup = NVReadRAMDAC(dev, head, NV_PRAMDAC_TV_SETUP); NVReadRAMDAC 416 drivers/gpu/drm/nouveau/dispnv04/hw.c regp->tv_vtotal = NVReadRAMDAC(dev, head, NV_PRAMDAC_TV_VTOTAL); NVReadRAMDAC 417 drivers/gpu/drm/nouveau/dispnv04/hw.c regp->tv_vskew = NVReadRAMDAC(dev, head, NV_PRAMDAC_TV_VSKEW); NVReadRAMDAC 418 drivers/gpu/drm/nouveau/dispnv04/hw.c regp->tv_vsync_delay = NVReadRAMDAC(dev, head, NV_PRAMDAC_TV_VSYNC_DELAY); NVReadRAMDAC 419 drivers/gpu/drm/nouveau/dispnv04/hw.c regp->tv_htotal = NVReadRAMDAC(dev, head, NV_PRAMDAC_TV_HTOTAL); NVReadRAMDAC 420 drivers/gpu/drm/nouveau/dispnv04/hw.c regp->tv_hskew = NVReadRAMDAC(dev, head, NV_PRAMDAC_TV_HSKEW); NVReadRAMDAC 421 drivers/gpu/drm/nouveau/dispnv04/hw.c regp->tv_hsync_delay = NVReadRAMDAC(dev, head, NV_PRAMDAC_TV_HSYNC_DELAY); NVReadRAMDAC 422 drivers/gpu/drm/nouveau/dispnv04/hw.c regp->tv_hsync_delay2 = NVReadRAMDAC(dev, head, NV_PRAMDAC_TV_HSYNC_DELAY2); NVReadRAMDAC 426 drivers/gpu/drm/nouveau/dispnv04/hw.c regp->fp_vert_regs[i] = NVReadRAMDAC(dev, head, ramdac_reg); NVReadRAMDAC 427 drivers/gpu/drm/nouveau/dispnv04/hw.c regp->fp_horiz_regs[i] = NVReadRAMDAC(dev, head, ramdac_reg + 0x20); NVReadRAMDAC 431 drivers/gpu/drm/nouveau/dispnv04/hw.c regp->dither = NVReadRAMDAC(dev, head, NV_RAMDAC_FP_DITHER); NVReadRAMDAC 433 drivers/gpu/drm/nouveau/dispnv04/hw.c regp->dither_regs[i] = NVReadRAMDAC(dev, head, NV_PRAMDAC_850 + i * 4); NVReadRAMDAC 434 drivers/gpu/drm/nouveau/dispnv04/hw.c regp->dither_regs[i + 3] = NVReadRAMDAC(dev, head, NV_PRAMDAC_85C + i * 4); NVReadRAMDAC 438 drivers/gpu/drm/nouveau/dispnv04/hw.c regp->fp_control = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL); NVReadRAMDAC 439 drivers/gpu/drm/nouveau/dispnv04/hw.c regp->fp_debug_0 = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_DEBUG_0); NVReadRAMDAC 446 drivers/gpu/drm/nouveau/dispnv04/hw.c regp->fp_debug_1 = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_DEBUG_1); NVReadRAMDAC 447 drivers/gpu/drm/nouveau/dispnv04/hw.c regp->fp_debug_2 = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_DEBUG_2); NVReadRAMDAC 449 drivers/gpu/drm/nouveau/dispnv04/hw.c regp->fp_margin_color = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_MARGIN_COLOR); NVReadRAMDAC 452 drivers/gpu/drm/nouveau/dispnv04/hw.c regp->ramdac_8c0 = NVReadRAMDAC(dev, head, NV_PRAMDAC_8C0); NVReadRAMDAC 455 drivers/gpu/drm/nouveau/dispnv04/hw.c regp->ramdac_a20 = NVReadRAMDAC(dev, head, NV_PRAMDAC_A20); NVReadRAMDAC 456 drivers/gpu/drm/nouveau/dispnv04/hw.c regp->ramdac_a24 = NVReadRAMDAC(dev, head, NV_PRAMDAC_A24); NVReadRAMDAC 457 drivers/gpu/drm/nouveau/dispnv04/hw.c regp->ramdac_a34 = NVReadRAMDAC(dev, head, NV_PRAMDAC_A34); NVReadRAMDAC 460 drivers/gpu/drm/nouveau/dispnv04/hw.c regp->ctv_regs[i] = NVReadRAMDAC(dev, head, NVReadRAMDAC 700 drivers/gpu/drm/nouveau/dispnv04/hw.c reg900 = NVReadRAMDAC(dev, head, NV_PRAMDAC_900); NVReadRAMDAC 106 drivers/gpu/drm/nouveau/dispnv04/hw.h return NVReadRAMDAC(dev, ramdac, NV_PRAMDAC_FP_TMDS_DATA + dl * 8); NVReadRAMDAC 348 drivers/gpu/drm/nouveau/dispnv04/hw.h uint32_t curpos = NVReadRAMDAC(dev, head, NV_PRAMDAC_CU_START_POS); NVReadRAMDAC 61 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c dacclk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset); NVReadRAMDAC 67 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c fp_htotal = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL); NVReadRAMDAC 68 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c fp_hsync_start = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START); NVReadRAMDAC 69 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c fp_hsync_end = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END); NVReadRAMDAC 70 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c fp_control = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL); NVReadRAMDAC 71 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c test_ctrl = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset); NVReadRAMDAC 72 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c ctv_1c = NVReadRAMDAC(dev, head, 0x680c1c); NVReadRAMDAC 73 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c ctv_14 = NVReadRAMDAC(dev, head, 0x680c14); NVReadRAMDAC 74 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c ctv_6c = NVReadRAMDAC(dev, head, 0x680c6c); NVReadRAMDAC 104 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c sample |= NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset) NVReadRAMDAC 110 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c sample |= NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset) NVReadRAMDAC 436 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c dacclk = (NVReadRAMDAC(dev, 0, dacclk_off) & ~0x30) | 0x1; NVReadRAMDAC 612 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c NVReadRAMDAC(dev, 0, NVReadRAMDAC 248 drivers/gpu/drm/nouveau/nouveau_bios.c sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000; NVReadRAMDAC 672 drivers/gpu/drm/nouveau/nouveau_bios.c sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000;