NV04_PFB_BOOT_0    55 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c 	nvkm_mask(device, NV04_PFB_BOOT_0, ~0,
NV04_PFB_BOOT_0    66 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c 		nvkm_mask(device, NV04_PFB_BOOT_0,
NV04_PFB_BOOT_0    76 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c 			nvkm_mask(device, NV04_PFB_BOOT_0,
NV04_PFB_BOOT_0    82 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c 		nvkm_mask(device, NV04_PFB_BOOT_0,
NV04_PFB_BOOT_0    89 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c 			nvkm_mask(device, NV04_PFB_BOOT_0,
NV04_PFB_BOOT_0    93 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c 			nvkm_mask(device, NV04_PFB_BOOT_0,
NV04_PFB_BOOT_0    97 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c 		nvkm_mask(device, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_TYPE,
NV04_PFB_BOOT_0   101 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c 		nvkm_mask(device, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_AMOUNT,
NV04_PFB_BOOT_0    75 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv05.c 	if (nvkm_rd32(device, NV04_PFB_BOOT_0) & NV04_PFB_BOOT_0_UMA_ENABLE)
NV04_PFB_BOOT_0    89 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv05.c 	nvkm_mask(device, NV04_PFB_BOOT_0, 0x3f, ramcfg[0]);
NV04_PFB_BOOT_0   102 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv05.c 		nvkm_mask(device, NV04_PFB_BOOT_0,
NV04_PFB_BOOT_0   106 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv05.c 	v = nvkm_rd32(device, NV04_PFB_BOOT_0) & NV04_PFB_BOOT_0_RAM_AMOUNT;
NV04_PFB_BOOT_0   111 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv05.c 		nvkm_mask(device, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_AMOUNT,
NV04_PFB_BOOT_0   116 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv05.c 		nvkm_mask(device, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_AMOUNT,
NV04_PFB_BOOT_0   120 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv05.c 		nvkm_mask(device, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_AMOUNT,
NV04_PFB_BOOT_0    35 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv04.c 	u32 boot0 = nvkm_rd32(device, NV04_PFB_BOOT_0);