NUM_SCLK_RANGE 367 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h sclkFcwRange_t SclkFcwRangeTable[NUM_SCLK_RANGE]; NUM_SCLK_RANGE 373 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h sclkFcwRange_t SclkFcwRangeTable[NUM_SCLK_RANGE]; NUM_SCLK_RANGE 68 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c static const sclkFcwRange_t Range_Table[NUM_SCLK_RANGE] = { NUM_SCLK_RANGE 809 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c for (i = 0; i < NUM_SCLK_RANGE; i++) { NUM_SCLK_RANGE 824 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c for (i = 0; i < NUM_SCLK_RANGE; i++) { NUM_SCLK_RANGE 873 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c for (i = 0; i < NUM_SCLK_RANGE; i++) { NUM_SCLK_RANGE 60 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.h struct polaris10_range_table range_table[NUM_SCLK_RANGE]; NUM_SCLK_RANGE 72 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c static const sclkFcwRange_t Range_Table[NUM_SCLK_RANGE] = { NUM_SCLK_RANGE 677 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c for (i = 0; i < NUM_SCLK_RANGE; i++) { NUM_SCLK_RANGE 697 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c for (i = 0; i < NUM_SCLK_RANGE; i++) { NUM_SCLK_RANGE 748 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c for (i = 0; i < NUM_SCLK_RANGE; i++) { NUM_SCLK_RANGE 69 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.h struct vegam_range_table range_table[NUM_SCLK_RANGE];