NUM_GFXCLK_DPM_LEVELS 1640 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c 	for (i = 0; i < NUM_GFXCLK_DPM_LEVELS; i++)
NUM_GFXCLK_DPM_LEVELS 1680 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	while (i < NUM_GFXCLK_DPM_LEVELS) {
NUM_GFXCLK_DPM_LEVELS 3061 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 					NUM_GFXCLK_DPM_LEVELS),
NUM_GFXCLK_DPM_LEVELS  313 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c 	for (i = 0; i < NUM_GFXCLK_DPM_LEVELS; i++)
NUM_GFXCLK_DPM_LEVELS   51 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h #define MAX_GFXCLK_DPM_LEVEL  (NUM_GFXCLK_DPM_LEVELS  - 1)
NUM_GFXCLK_DPM_LEVELS  419 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint16_t       FreqTableGfx      [NUM_GFXCLK_DPM_LEVELS  ];
NUM_GFXCLK_DPM_LEVELS   44 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h #define MAX_GFXCLK_DPM_LEVEL  (NUM_GFXCLK_DPM_LEVELS  - 1)
NUM_GFXCLK_DPM_LEVELS  499 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint16_t       FreqTableGfx      [NUM_GFXCLK_DPM_LEVELS  ];     // In MHz
NUM_GFXCLK_DPM_LEVELS   50 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h #define MAX_GFXCLK_DPM_LEVEL  (NUM_GFXCLK_DPM_LEVELS  - 1)
NUM_GFXCLK_DPM_LEVELS  584 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint16_t       FreqTableGfx      [NUM_GFXCLK_DPM_LEVELS  ];     // In MHz
NUM_GFXCLK_DPM_LEVELS   46 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h #define MAX_GFXCLK_DPM_LEVEL  (NUM_GFXCLK_DPM_LEVELS  - 1)
NUM_GFXCLK_DPM_LEVELS  180 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   PllSetting_t GfxclkLevel        [NUM_GFXCLK_DPM_LEVELS];
NUM_GFXCLK_DPM_LEVELS  229 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      CksEnable[NUM_GFXCLK_DPM_LEVELS];
NUM_GFXCLK_DPM_LEVELS  230 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      CksVidOffset[NUM_GFXCLK_DPM_LEVELS];
NUM_GFXCLK_DPM_LEVELS  294 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      StaticVoltageOffsetVid[NUM_GFXCLK_DPM_LEVELS]; /* This values are added on to the final voltage calculation */
NUM_GFXCLK_DPM_LEVELS  315 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      AcgEnable[NUM_GFXCLK_DPM_LEVELS];
NUM_GFXCLK_DPM_LEVELS  320 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint32_t     AcgFreqTable[NUM_GFXCLK_DPM_LEVELS];
NUM_GFXCLK_DPM_LEVELS  354 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   float        AvfsGbCksOn[NUM_GFXCLK_DPM_LEVELS];
NUM_GFXCLK_DPM_LEVELS  355 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   float        AcBtcGbCksOn[NUM_GFXCLK_DPM_LEVELS];
NUM_GFXCLK_DPM_LEVELS  356 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   float        AvfsGbCksOff[NUM_GFXCLK_DPM_LEVELS];
NUM_GFXCLK_DPM_LEVELS  357 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   float        AcBtcGbCksOff[NUM_GFXCLK_DPM_LEVELS];
NUM_GFXCLK_DPM_LEVELS  364 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint32_t     AvfsGbCksOn[NUM_GFXCLK_DPM_LEVELS];
NUM_GFXCLK_DPM_LEVELS  365 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint32_t     AcBtcGbCksOn[NUM_GFXCLK_DPM_LEVELS];
NUM_GFXCLK_DPM_LEVELS  366 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint32_t     AvfsGbCksOff[NUM_GFXCLK_DPM_LEVELS];
NUM_GFXCLK_DPM_LEVELS  367 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint32_t     AcBtcGbCksOff[NUM_GFXCLK_DPM_LEVELS];
NUM_GFXCLK_DPM_LEVELS   48 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h #define MAX_GFXCLK_DPM_LEVEL  (NUM_GFXCLK_DPM_LEVELS  - 1)
NUM_GFXCLK_DPM_LEVELS  307 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint16_t       FreqTableGfx      [NUM_GFXCLK_DPM_LEVELS  ];
NUM_GFXCLK_DPM_LEVELS  598 drivers/gpu/drm/amd/powerplay/navi10_ppt.c 	dpm_context->dpm_tables.gfx_table.max = driver_ppt->FreqTableGfx[NUM_GFXCLK_DPM_LEVELS - 1];