NUM_DCEFCLK_DPM_LEVELS  452 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 						NUM_DCEFCLK_DPM_LEVELS,
NUM_DCEFCLK_DPM_LEVELS  341 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c 	for (i = 0; i < NUM_DCEFCLK_DPM_LEVELS; i++)
NUM_DCEFCLK_DPM_LEVELS  110 drivers/gpu/drm/amd/powerplay/inc/smu10_driver_if.h 	DpmClock_t DcefClocks[NUM_DCEFCLK_DPM_LEVELS];
NUM_DCEFCLK_DPM_LEVELS   59 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h #define MAX_DCEFCLK_DPM_LEVEL (NUM_DCEFCLK_DPM_LEVELS - 1)
NUM_DCEFCLK_DPM_LEVELS  426 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint16_t       FreqTableDcefclk  [NUM_DCEFCLK_DPM_LEVELS ];
NUM_DCEFCLK_DPM_LEVELS   56 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h #define MAX_DCEFCLK_DPM_LEVEL (NUM_DCEFCLK_DPM_LEVELS - 1)
NUM_DCEFCLK_DPM_LEVELS  589 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint16_t       FreqTableDcefclk  [NUM_DCEFCLK_DPM_LEVELS ];     // In MHz
NUM_DCEFCLK_DPM_LEVELS   52 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h #define MAX_DCEFCLK_DPM_LEVEL (NUM_DCEFCLK_DPM_LEVELS - 1)
NUM_DCEFCLK_DPM_LEVELS   55 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h #define MAX_DCEFCLK_DPM_LEVEL (NUM_DCEFCLK_DPM_LEVELS - 1)
NUM_DCEFCLK_DPM_LEVELS  313 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint16_t       FreqTableDcefclk  [NUM_DCEFCLK_DPM_LEVELS ];
NUM_DCEFCLK_DPM_LEVELS  610 drivers/gpu/drm/amd/powerplay/navi10_ppt.c 	dpm_context->dpm_tables.dcef_table.max = driver_ppt->FreqTableDcefclk[NUM_DCEFCLK_DPM_LEVELS - 1];