NOOFROWS_MASK    3679 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	row = ((tmp & NOOFROWS_MASK) >> NOOFROWS_SHIFT) + 10;
NOOFROWS_MASK    4744 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	u32 tmp = (RREG32(MC_ARB_RAMCFG) & NOOFROWS_MASK) >> NOOFROWS_SHIFT;
NOOFROWS_MASK    2110 drivers/gpu/drm/radeon/r600.c 	tmp = (ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT;
NOOFROWS_MASK     787 drivers/gpu/drm/radeon/rv6xx_dpm.c 	tmp = (RREG32(RAMCFG) & NOOFROWS_MASK) >> NOOFROWS_SHIFT;
NOOFROWS_MASK    1366 drivers/gpu/drm/radeon/rv770.c 	if (((mc_arb_ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT) > 3) {
NOOFROWS_MASK    1371 drivers/gpu/drm/radeon/rv770.c 			ROW_TILING(((mc_arb_ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT));
NOOFROWS_MASK    1373 drivers/gpu/drm/radeon/rv770.c 			SAMPLE_SPLIT(((mc_arb_ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT));
NOOFROWS_MASK     729 drivers/gpu/drm/radeon/rv770_dpm.c 	tmp = (RREG32(MC_ARB_RAMCFG) & NOOFROWS_MASK) >> NOOFROWS_SHIFT;
NOOFROWS_MASK    3220 drivers/gpu/drm/radeon/si_dpm.c 	row = ((tmp & NOOFROWS_MASK) >> NOOFROWS_SHIFT) + 10;
NOOFROWS_MASK    4280 drivers/gpu/drm/radeon/si_dpm.c 	u32 tmp = (RREG32(MC_ARB_RAMCFG) & NOOFROWS_MASK) >> NOOFROWS_SHIFT;