NI_DIG_BE_CNTL   2594 drivers/gpu/drm/radeon/evergreen.c 			dig_be = RREG32(NI_DIG_BE_CNTL + ni_dig_offsets[i]);
NI_DIG_BE_CNTL     38 drivers/gpu/drm/radeon/radeon_dp_mst.c 	reg = RREG32(NI_DIG_BE_CNTL + primary->offset);
NI_DIG_BE_CNTL     50 drivers/gpu/drm/radeon/radeon_dp_mst.c 	DRM_DEBUG_KMS("writing 0x%08x 0x%08x\n", NI_DIG_BE_CNTL + primary->offset, reg);
NI_DIG_BE_CNTL     51 drivers/gpu/drm/radeon/radeon_dp_mst.c 	WREG32(NI_DIG_BE_CNTL + primary->offset, reg);