NCR5380_read      206 drivers/scsi/NCR5380.c 		if ((NCR5380_read(reg1) & bit1) == val1)
NCR5380_read      208 drivers/scsi/NCR5380.c 		if ((NCR5380_read(reg2) & bit2) == val2)
NCR5380_read      219 drivers/scsi/NCR5380.c 		if ((NCR5380_read(reg1) & bit1) == val1)
NCR5380_read      221 drivers/scsi/NCR5380.c 		if ((NCR5380_read(reg2) & bit2) == val2)
NCR5380_read      289 drivers/scsi/NCR5380.c 	status = NCR5380_read(STATUS_REG);
NCR5380_read      290 drivers/scsi/NCR5380.c 	mr = NCR5380_read(MODE_REG);
NCR5380_read      291 drivers/scsi/NCR5380.c 	icr = NCR5380_read(INITIATOR_COMMAND_REG);
NCR5380_read      292 drivers/scsi/NCR5380.c 	basr = NCR5380_read(BUS_AND_STATUS_REG);
NCR5380_read      339 drivers/scsi/NCR5380.c 	status = NCR5380_read(STATUS_REG);
NCR5380_read      436 drivers/scsi/NCR5380.c 		NCR5380_read(STATUS_REG);
NCR5380_read      465 drivers/scsi/NCR5380.c 	for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) {
NCR5380_read      753 drivers/scsi/NCR5380.c 			if ((NCR5380_read(BUS_AND_STATUS_REG) &
NCR5380_read      756 drivers/scsi/NCR5380.c 				saved_data = NCR5380_read(INPUT_DATA_REG);
NCR5380_read      770 drivers/scsi/NCR5380.c 	if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) ==
NCR5380_read      773 drivers/scsi/NCR5380.c 		       NCR5380_read(BUS_AND_STATUS_REG));
NCR5380_read      782 drivers/scsi/NCR5380.c 	NCR5380_read(RESET_PARITY_INTERRUPT_REG);
NCR5380_read      795 drivers/scsi/NCR5380.c 		if ((NCR5380_read(STATUS_REG) & PHASE_MASK) == p && (p & SR_IO)) {
NCR5380_read      859 drivers/scsi/NCR5380.c 	basr = NCR5380_read(BUS_AND_STATUS_REG);
NCR5380_read      861 drivers/scsi/NCR5380.c 		unsigned char mr = NCR5380_read(MODE_REG);
NCR5380_read      862 drivers/scsi/NCR5380.c 		unsigned char sr = NCR5380_read(STATUS_REG);
NCR5380_read      880 drivers/scsi/NCR5380.c 				NCR5380_read(RESET_PARITY_INTERRUPT_REG);
NCR5380_read      882 drivers/scsi/NCR5380.c 		} else if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) &&
NCR5380_read      886 drivers/scsi/NCR5380.c 			NCR5380_read(RESET_PARITY_INTERRUPT_REG);
NCR5380_read      898 drivers/scsi/NCR5380.c 			NCR5380_read(RESET_PARITY_INTERRUPT_REG);
NCR5380_read      999 drivers/scsi/NCR5380.c 	if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) {
NCR5380_read     1020 drivers/scsi/NCR5380.c 	if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) ||
NCR5380_read     1021 drivers/scsi/NCR5380.c 	    (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) ||
NCR5380_read     1022 drivers/scsi/NCR5380.c 	    (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) {
NCR5380_read     1049 drivers/scsi/NCR5380.c 	if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE))
NCR5380_read     1124 drivers/scsi/NCR5380.c 	if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) {
NCR5380_read     1270 drivers/scsi/NCR5380.c 		if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) {
NCR5380_read     1280 drivers/scsi/NCR5380.c 			*d = NCR5380_read(CURRENT_SCSI_DATA_REG);
NCR5380_read     1338 drivers/scsi/NCR5380.c 	tmp = NCR5380_read(STATUS_REG);
NCR5380_read     1373 drivers/scsi/NCR5380.c 	              PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK));
NCR5380_read     1377 drivers/scsi/NCR5380.c 	(void)NCR5380_read(RESET_PARITY_INTERRUPT_REG);
NCR5380_read     1413 drivers/scsi/NCR5380.c 	tmp = NCR5380_read(STATUS_REG) & PHASE_MASK;
NCR5380_read     1474 drivers/scsi/NCR5380.c 	if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) {
NCR5380_read     1618 drivers/scsi/NCR5380.c 			d[*count - 1] = NCR5380_read(INPUT_DATA_REG);
NCR5380_read     1673 drivers/scsi/NCR5380.c 		tmp = NCR5380_read(STATUS_REG);
NCR5380_read     1710 drivers/scsi/NCR5380.c 				while (NCR5380_read(STATUS_REG) & SR_REQ)
NCR5380_read     2020 drivers/scsi/NCR5380.c 	target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask);
NCR5380_read     2051 drivers/scsi/NCR5380.c 		if ((NCR5380_read(STATUS_REG) & (SR_BSY | SR_SEL)) == 0)
NCR5380_read     2064 drivers/scsi/NCR5380.c 	msg[0] = NCR5380_read(CURRENT_SCSI_DATA_REG);
NCR5380_read      289 drivers/scsi/NCR5380.h 	if ((NCR5380_read(reg) & bit) == val)
NCR5380_read      128 drivers/scsi/g_NCR5380.c 	              PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK));
NCR5380_read      154 drivers/scsi/g_NCR5380.c 	NCR5380_read(RESET_PARITY_INTERRUPT_REG);
NCR5380_read      158 drivers/scsi/g_NCR5380.c 	NCR5380_read(RESET_PARITY_INTERRUPT_REG);
NCR5380_read      371 drivers/scsi/g_NCR5380.c 	if (NCR5380_read(MODE_REG) != 0) {
NCR5380_read      500 drivers/scsi/g_NCR5380.c 		if (NCR5380_read(hostdata->c400_ctl_status) & CSR_53C80_REG)
NCR5380_read      540 drivers/scsi/g_NCR5380.c 			    NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
NCR5380_read      601 drivers/scsi/g_NCR5380.c 		    NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY) {
NCR5380_read      610 drivers/scsi/g_NCR5380.c 		if (start >= len && NCR5380_read(hostdata->c400_blk_cnt) == 0)
NCR5380_read      613 drivers/scsi/g_NCR5380.c 		if (NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ) {
NCR5380_read      310 drivers/scsi/mac_scsi.c 		if (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_PHASE_MATCH))
NCR5380_read      378 drivers/scsi/mac_scsi.c 		if (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_PHASE_MATCH))