NAND_CMD_READ0    998 drivers/mtd/nand/raw/atmel/nand-controller.c 	nc->op.cmds[nc->op.ncmds++] = NAND_CMD_READ0;
NAND_CMD_READ0    262 drivers/mtd/nand/raw/au1550nd.c 			readcmd = NAND_CMD_READ0;
NAND_CMD_READ0    288 drivers/mtd/nand/raw/au1550nd.c 			if (command == NAND_CMD_READ0 ||
NAND_CMD_READ0    330 drivers/mtd/nand/raw/au1550nd.c 	case NAND_CMD_READ0:
NAND_CMD_READ0    264 drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c 	case NAND_CMD_READ0:
NAND_CMD_READ0    341 drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c 	case NAND_CMD_READ0:
NAND_CMD_READ0    188 drivers/mtd/nand/raw/cafe_nand.c 		command = NAND_CMD_READ0;
NAND_CMD_READ0    221 drivers/mtd/nand/raw/cafe_nand.c 	} else if (command == NAND_CMD_READ0 || command == NAND_CMD_READ1 ||
NAND_CMD_READ0    244 drivers/mtd/nand/raw/cafe_nand.c 	else if (command == NAND_CMD_READ0 && mtd->writesize > 512)
NAND_CMD_READ0    669 drivers/mtd/nand/raw/diskonchip.c 			readcmd = NAND_CMD_READ0;
NAND_CMD_READ0    700 drivers/mtd/nand/raw/diskonchip.c 		if (command == NAND_CMD_READ0 || command == NAND_CMD_READ1 ||
NAND_CMD_READ0    290 drivers/mtd/nand/raw/fsl_elbc_nand.c 		out_be32(&lbc->fcr, (NAND_CMD_READ0 << FCR_CMD0_SHIFT) |
NAND_CMD_READ0    302 drivers/mtd/nand/raw/fsl_elbc_nand.c 			out_be32(&lbc->fcr, NAND_CMD_READ0 << FCR_CMD0_SHIFT);
NAND_CMD_READ0    329 drivers/mtd/nand/raw/fsl_elbc_nand.c 	case NAND_CMD_READ0:
NAND_CMD_READ0    469 drivers/mtd/nand/raw/fsl_elbc_nand.c 				fcr |= NAND_CMD_READ0 << FCR_CMD0_SHIFT;
NAND_CMD_READ0    268 drivers/mtd/nand/raw/fsl_ifc_nand.c 		ifc_out32((NAND_CMD_READ0 << IFC_NAND_FCR0_CMD0_SHIFT) |
NAND_CMD_READ0    284 drivers/mtd/nand/raw/fsl_ifc_nand.c 			ifc_out32(NAND_CMD_READ0 <<
NAND_CMD_READ0    305 drivers/mtd/nand/raw/fsl_ifc_nand.c 	case NAND_CMD_READ0:
NAND_CMD_READ0    432 drivers/mtd/nand/raw/fsl_ifc_nand.c 				NAND_CMD_READ0 << IFC_NAND_FCR0_CMD0_SHIFT;
NAND_CMD_READ0    264 drivers/mtd/nand/raw/hisi504_nand.c 	hinfc_write(host, NAND_CMD_READSTART << 8 | NAND_CMD_READ0,
NAND_CMD_READ0    434 drivers/mtd/nand/raw/hisi504_nand.c 	case NAND_CMD_READ0:
NAND_CMD_READ0    436 drivers/mtd/nand/raw/hisi504_nand.c 		if (command == NAND_CMD_READ0)
NAND_CMD_READ0    994 drivers/mtd/nand/raw/marvell_nand.c 			   NDCB0_CMD1(NAND_CMD_READ0) |
NAND_CMD_READ0   1262 drivers/mtd/nand/raw/marvell_nand.c 				  NDCB0_CMD1(NAND_CMD_READ0) |
NAND_CMD_READ0    587 drivers/mtd/nand/raw/meson_nand.c 	cmd0 = in ? NAND_CMD_READ0 : NAND_CMD_SEQIN;
NAND_CMD_READ0    337 drivers/mtd/nand/raw/mpc5121_nfc.c 	case NAND_CMD_READ0:
NAND_CMD_READ0    343 drivers/mtd/nand/raw/mpc5121_nfc.c 		command = NAND_CMD_READ0;
NAND_CMD_READ0    349 drivers/mtd/nand/raw/mpc5121_nfc.c 		command = NAND_CMD_READ0;
NAND_CMD_READ0    354 drivers/mtd/nand/raw/mpc5121_nfc.c 		mpc5121_nfc_command(chip, NAND_CMD_READ0, column, page);
NAND_CMD_READ0    372 drivers/mtd/nand/raw/mpc5121_nfc.c 	case NAND_CMD_READ0:
NAND_CMD_READ0    724 drivers/mtd/nand/raw/mxc_nand.c 	host->devtype_data->send_cmd(host, NAND_CMD_READ0, false);
NAND_CMD_READ0    783 drivers/mtd/nand/raw/mxc_nand.c 	host->devtype_data->send_cmd(host, NAND_CMD_READ0, false);
NAND_CMD_READ0   1021 drivers/mtd/nand/raw/nand_base.c 		NAND_OP_CMD(NAND_CMD_READ0, 0),
NAND_CMD_READ0   1063 drivers/mtd/nand/raw/nand_base.c 		NAND_OP_CMD(NAND_CMD_READ0, 0),
NAND_CMD_READ0   1126 drivers/mtd/nand/raw/nand_base.c 	chip->legacy.cmdfunc(chip, NAND_CMD_READ0, offset_in_page, page);
NAND_CMD_READ0   1296 drivers/mtd/nand/raw/nand_base.c 		NAND_OP_CMD(NAND_CMD_READ0, 0),
NAND_CMD_READ0   1649 drivers/mtd/nand/raw/nand_base.c 			NAND_OP_CMD(NAND_CMD_READ0, 0),
NAND_CMD_READ0   1656 drivers/mtd/nand/raw/nand_base.c 	chip->legacy.cmdfunc(chip, NAND_CMD_READ0, -1, -1);
NAND_CMD_READ0    264 drivers/mtd/nand/raw/nand_legacy.c 			readcmd = NAND_CMD_READ0;
NAND_CMD_READ0    325 drivers/mtd/nand/raw/nand_legacy.c 	case NAND_CMD_READ0:
NAND_CMD_READ0    393 drivers/mtd/nand/raw/nand_legacy.c 		command = NAND_CMD_READ0;
NAND_CMD_READ0    472 drivers/mtd/nand/raw/nand_legacy.c 	case NAND_CMD_READ0:
NAND_CMD_READ0   1068 drivers/mtd/nand/raw/nandsim.c 	case NAND_CMD_READ0:
NAND_CMD_READ0   1094 drivers/mtd/nand/raw/nandsim.c 		case NAND_CMD_READ0:
NAND_CMD_READ0   1469 drivers/mtd/nand/raw/qcom_nandc.c 	case NAND_CMD_READ0:
NAND_CMD_READ0    558 drivers/mtd/nand/raw/sh_flctl.c 	case NAND_CMD_READ0:
NAND_CMD_READ0    628 drivers/mtd/nand/raw/sh_flctl.c 	set_cmd_regs(mtd, NAND_CMD_READ0,
NAND_CMD_READ0    629 drivers/mtd/nand/raw/sh_flctl.c 		(NAND_CMD_READSTART << 8) | NAND_CMD_READ0);
NAND_CMD_READ0    675 drivers/mtd/nand/raw/sh_flctl.c 	set_cmd_regs(mtd, NAND_CMD_READ0,
NAND_CMD_READ0    676 drivers/mtd/nand/raw/sh_flctl.c 		(NAND_CMD_READSTART << 8) | NAND_CMD_READ0);
NAND_CMD_READ0    753 drivers/mtd/nand/raw/sh_flctl.c 	case NAND_CMD_READ0:
NAND_CMD_READ0    782 drivers/mtd/nand/raw/sh_flctl.c 				| NAND_CMD_READ0);
NAND_CMD_READ0    841 drivers/mtd/nand/raw/sh_flctl.c 				read_cmd = NAND_CMD_READ0;
NAND_CMD_READ0    817 drivers/mtd/nand/raw/stm32_fmc2_nand.c 		csqcfgr1 |= FMC2_CSQCFGR1_CMD1(NAND_CMD_READ0) |
NAND_CMD_READ0    504 drivers/mtd/nand/raw/tegra_nand.c 		writel_relaxed(NAND_CMD_READ0, ctrl->regs + CMD_REG1);
NAND_CMD_READ0    562 drivers/mtd/nand/raw/vf610_nfc.c 	cmd2 |= NAND_CMD_READ0 << CMD_BYTE1_SHIFT;