M_HDMI_VIDEO      267 arch/arc/plat-hsdk/platform.c 	writel(0x77777777, CREG_AXI_M_SLV0(M_HDMI_VIDEO));
M_HDMI_VIDEO      268 arch/arc/plat-hsdk/platform.c 	writel(0x77777777, CREG_AXI_M_SLV1(M_HDMI_VIDEO));
M_HDMI_VIDEO      269 arch/arc/plat-hsdk/platform.c 	writel(0xFEDCBA98, CREG_AXI_M_OFT0(M_HDMI_VIDEO));
M_HDMI_VIDEO      270 arch/arc/plat-hsdk/platform.c 	writel(0x76543210, CREG_AXI_M_OFT1(M_HDMI_VIDEO));
M_HDMI_VIDEO      271 arch/arc/plat-hsdk/platform.c 	writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_HDMI_VIDEO));