MX31_SPBA0_BASE_ADDR   44 arch/arm/mach-imx/mx31.h #define MX31_SDHC1_BASE_ADDR			(MX31_SPBA0_BASE_ADDR + 0x04000)
MX31_SPBA0_BASE_ADDR   45 arch/arm/mach-imx/mx31.h #define MX31_SDHC2_BASE_ADDR			(MX31_SPBA0_BASE_ADDR + 0x08000)
MX31_SPBA0_BASE_ADDR   46 arch/arm/mach-imx/mx31.h #define MX31_UART3_BASE_ADDR			(MX31_SPBA0_BASE_ADDR + 0x0c000)
MX31_SPBA0_BASE_ADDR   47 arch/arm/mach-imx/mx31.h #define MX31_CSPI2_BASE_ADDR			(MX31_SPBA0_BASE_ADDR + 0x10000)
MX31_SPBA0_BASE_ADDR   48 arch/arm/mach-imx/mx31.h #define MX31_SSI2_BASE_ADDR			(MX31_SPBA0_BASE_ADDR + 0x14000)
MX31_SPBA0_BASE_ADDR   49 arch/arm/mach-imx/mx31.h #define MX31_SIM1_BASE_ADDR			(MX31_SPBA0_BASE_ADDR + 0x18000)
MX31_SPBA0_BASE_ADDR   50 arch/arm/mach-imx/mx31.h #define MX31_IIM_BASE_ADDR			(MX31_SPBA0_BASE_ADDR + 0x1c000)
MX31_SPBA0_BASE_ADDR   51 arch/arm/mach-imx/mx31.h #define MX31_ATA_DMA_BASE_ADDR			(MX31_SPBA0_BASE_ADDR + 0x20000)
MX31_SPBA0_BASE_ADDR   52 arch/arm/mach-imx/mx31.h #define MX31_MSHC1_BASE_ADDR			(MX31_SPBA0_BASE_ADDR + 0x24000)
MX31_SPBA0_BASE_ADDR   53 arch/arm/mach-imx/mx31.h #define MX31_SPBA_CTRL_BASE_ADDR		(MX31_SPBA0_BASE_ADDR + 0x3c000)