MX27_USB_BASE_ADDR   34 arch/arm/mach-imx/ehci-imx27.c 	v = readl(MX27_IO_ADDRESS(MX27_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
MX27_USB_BASE_ADDR   70 arch/arm/mach-imx/ehci-imx27.c 	writel(v, MX27_IO_ADDRESS(MX27_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
MX27_USB_BASE_ADDR   57 arch/arm/mach-imx/mx27.h #define MX27_USB_OTG_BASE_ADDR			(MX27_USB_BASE_ADDR + 0x0000)
MX27_USB_BASE_ADDR   58 arch/arm/mach-imx/mx27.h #define MX27_USB_HS1_BASE_ADDR			(MX27_USB_BASE_ADDR + 0x0200)
MX27_USB_BASE_ADDR   59 arch/arm/mach-imx/mx27.h #define MX27_USB_HS2_BASE_ADDR			(MX27_USB_BASE_ADDR + 0x0400)