MX27_IO_ADDRESS    29 arch/arm/mach-imx/cpu-imx27.c 	val = imx_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR + SYS_CHIP_ID));
MX27_IO_ADDRESS    34 arch/arm/mach-imx/ehci-imx27.c 	v = readl(MX27_IO_ADDRESS(MX27_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
MX27_IO_ADDRESS    70 arch/arm/mach-imx/ehci-imx27.c 	writel(v, MX27_IO_ADDRESS(MX27_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
MX27_IO_ADDRESS    56 arch/arm/mach-imx/mm-imx27.c 	imx_iomuxv1_init(MX27_IO_ADDRESS(MX27_GPIO_BASE_ADDR),
MX27_IO_ADDRESS    62 arch/arm/mach-imx/mm-imx27.c 	mxc_init_irq(MX27_IO_ADDRESS(MX27_AVIC_BASE_ADDR));
MX27_IO_ADDRESS    71 arch/arm/mach-imx/mm-imx27.c 	mxc_arch_reset_init(MX27_IO_ADDRESS(MX27_WDOG_BASE_ADDR));
MX27_IO_ADDRESS    22 arch/arm/mach-imx/pm-imx27.c 		cscr = imx_readl(MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR));
MX27_IO_ADDRESS    24 arch/arm/mach-imx/pm-imx27.c 		imx_writel(cscr, MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR));