ASM_CONST 33 arch/microblaze/include/asm/page.h #define PAGE_SIZE (ASM_CONST(1) << PAGE_SHIFT) ASM_CONST 36 arch/microblaze/include/asm/page.h #define LOAD_OFFSET ASM_CONST((CONFIG_KERNEL_START-CONFIG_KERNEL_BASE_ADDR)) ASM_CONST 17 arch/powerpc/boot/page.h #define PAGE_SIZE (ASM_CONST(1) << PAGE_SHIFT) ASM_CONST 23 arch/powerpc/include/asm/book3s/64/hash-4k.h #define H_KERN_MAP_SIZE (ASM_CONST(1) << REGION_SHIFT) ASM_CONST 29 arch/powerpc/include/asm/book3s/64/hash-4k.h #define H_KERN_VIRT_START ASM_CONST(0xc000100000000000) ASM_CONST 27 arch/powerpc/include/asm/book3s/64/hash-64k.h #define H_KERN_VIRT_START ASM_CONST(0xc008000000000000) ASM_CONST 31 arch/powerpc/include/asm/book3s/64/hash.h #define H_PGTABLE_RANGE (ASM_CONST(1) << H_PGTABLE_EADDR_SIZE) ASM_CONST 34 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define SLB_ESID_V ASM_CONST(0x0000000008000000) /* valid */ ASM_CONST 41 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define SLB_VSID_B ASM_CONST(0xc000000000000000) ASM_CONST 42 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define SLB_VSID_B_256M ASM_CONST(0x0000000000000000) ASM_CONST 43 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define SLB_VSID_B_1T ASM_CONST(0x4000000000000000) ASM_CONST 44 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define SLB_VSID_KS ASM_CONST(0x0000000000000800) ASM_CONST 45 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define SLB_VSID_KP ASM_CONST(0x0000000000000400) ASM_CONST 46 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define SLB_VSID_N ASM_CONST(0x0000000000000200) /* no-execute */ ASM_CONST 47 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define SLB_VSID_L ASM_CONST(0x0000000000000100) ASM_CONST 48 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define SLB_VSID_C ASM_CONST(0x0000000000000080) /* class */ ASM_CONST 49 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define SLB_VSID_LP ASM_CONST(0x0000000000000030) ASM_CONST 50 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define SLB_VSID_LP_00 ASM_CONST(0x0000000000000000) ASM_CONST 51 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define SLB_VSID_LP_01 ASM_CONST(0x0000000000000010) ASM_CONST 52 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define SLB_VSID_LP_10 ASM_CONST(0x0000000000000020) ASM_CONST 53 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define SLB_VSID_LP_11 ASM_CONST(0x0000000000000030) ASM_CONST 70 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_V_COMMON_BITS ASM_CONST(0x000fffffffffffff) ASM_CONST 71 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_V_AVPN ASM_CONST(0x3fffffffffffff80) ASM_CONST 72 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_V_AVPN_3_0 ASM_CONST(0x000fffffffffff80) ASM_CONST 75 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_V_BOLTED ASM_CONST(0x0000000000000010) ASM_CONST 76 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_V_LOCK ASM_CONST(0x0000000000000008) ASM_CONST 77 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_V_LARGE ASM_CONST(0x0000000000000004) ASM_CONST 78 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_V_SECONDARY ASM_CONST(0x0000000000000002) ASM_CONST 79 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_V_VALID ASM_CONST(0x0000000000000001) ASM_CONST 86 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_R_PP0 ASM_CONST(0x8000000000000000) ASM_CONST 87 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_R_TS ASM_CONST(0x4000000000000000) ASM_CONST 88 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_R_KEY_HI ASM_CONST(0x3000000000000000) ASM_CONST 89 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_R_KEY_BIT0 ASM_CONST(0x2000000000000000) ASM_CONST 90 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_R_KEY_BIT1 ASM_CONST(0x1000000000000000) ASM_CONST 92 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_R_RPN ASM_CONST(0x0ffffffffffff000) ASM_CONST 93 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_R_RPN_3_0 ASM_CONST(0x01fffffffffff000) ASM_CONST 94 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_R_PP ASM_CONST(0x0000000000000003) ASM_CONST 95 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_R_PPP ASM_CONST(0x8000000000000003) ASM_CONST 96 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_R_N ASM_CONST(0x0000000000000004) ASM_CONST 97 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_R_G ASM_CONST(0x0000000000000008) ASM_CONST 98 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_R_M ASM_CONST(0x0000000000000010) ASM_CONST 99 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_R_I ASM_CONST(0x0000000000000020) ASM_CONST 100 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_R_W ASM_CONST(0x0000000000000040) ASM_CONST 101 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_R_WIMG ASM_CONST(0x0000000000000078) ASM_CONST 102 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_R_C ASM_CONST(0x0000000000000080) ASM_CONST 103 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_R_R ASM_CONST(0x0000000000000100) ASM_CONST 104 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_R_KEY_LO ASM_CONST(0x0000000000000e00) ASM_CONST 105 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_R_KEY_BIT2 ASM_CONST(0x0000000000000800) ASM_CONST 106 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_R_KEY_BIT3 ASM_CONST(0x0000000000000400) ASM_CONST 107 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_R_KEY_BIT4 ASM_CONST(0x0000000000000200) ASM_CONST 110 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_V_1TB_SEG ASM_CONST(0x4000000000000000) ASM_CONST 111 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_V_VRMA_MASK ASM_CONST(0x4001ffffff000000) ASM_CONST 602 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define MAX_USER_CONTEXT ((ASM_CONST(1) << CONTEXT_BITS) - 2) ASM_CONST 611 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define MAX_USER_CONTEXT_65BIT_VA ((ASM_CONST(1) << (65 - (SID_SHIFT + ESID_BITS))) - 2) ASM_CONST 638 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define VSID_MULTIPLIER_256M ASM_CONST(12538073) /* 24-bit prime */ ASM_CONST 644 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define VSID_MULINV_256M ASM_CONST(665548017062) ASM_CONST 646 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define VSID_MULTIPLIER_1T ASM_CONST(12538073) /* 24-bit prime */ ASM_CONST 649 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define VSID_MULINV_1T ASM_CONST(209034062) ASM_CONST 43 arch/powerpc/include/asm/book3s/64/radix.h #define RADIX_PGTABLE_RANGE (ASM_CONST(1) << RADIX_PGTABLE_EADDR_SIZE) ASM_CONST 94 arch/powerpc/include/asm/book3s/64/radix.h #define RADIX_KERN_VIRT_START ASM_CONST(0xc008000000000000) ASM_CONST 135 arch/powerpc/include/asm/cputable.h #define CPU_FTR_COHERENT_ICACHE ASM_CONST(0x00000001) ASM_CONST 136 arch/powerpc/include/asm/cputable.h #define CPU_FTR_ALTIVEC ASM_CONST(0x00000002) ASM_CONST 137 arch/powerpc/include/asm/cputable.h #define CPU_FTR_DBELL ASM_CONST(0x00000004) ASM_CONST 138 arch/powerpc/include/asm/cputable.h #define CPU_FTR_CAN_NAP ASM_CONST(0x00000008) ASM_CONST 139 arch/powerpc/include/asm/cputable.h #define CPU_FTR_DEBUG_LVL_EXC ASM_CONST(0x00000010) ASM_CONST 140 arch/powerpc/include/asm/cputable.h #define CPU_FTR_NODSISRALIGN ASM_CONST(0x00000020) ASM_CONST 141 arch/powerpc/include/asm/cputable.h #define CPU_FTR_FPU_UNAVAILABLE ASM_CONST(0x00000040) ASM_CONST 142 arch/powerpc/include/asm/cputable.h #define CPU_FTR_LWSYNC ASM_CONST(0x00000080) ASM_CONST 143 arch/powerpc/include/asm/cputable.h #define CPU_FTR_NOEXECUTE ASM_CONST(0x00000100) ASM_CONST 144 arch/powerpc/include/asm/cputable.h #define CPU_FTR_EMB_HV ASM_CONST(0x00000200) ASM_CONST 148 arch/powerpc/include/asm/cputable.h #define CPU_FTR_L2CR ASM_CONST(0x00002000) ASM_CONST 149 arch/powerpc/include/asm/cputable.h #define CPU_FTR_SPEC7450 ASM_CONST(0x00004000) ASM_CONST 150 arch/powerpc/include/asm/cputable.h #define CPU_FTR_TAU ASM_CONST(0x00008000) ASM_CONST 151 arch/powerpc/include/asm/cputable.h #define CPU_FTR_CAN_DOZE ASM_CONST(0x00010000) ASM_CONST 152 arch/powerpc/include/asm/cputable.h #define CPU_FTR_L3CR ASM_CONST(0x00040000) ASM_CONST 153 arch/powerpc/include/asm/cputable.h #define CPU_FTR_L3_DISABLE_NAP ASM_CONST(0x00080000) ASM_CONST 154 arch/powerpc/include/asm/cputable.h #define CPU_FTR_NAP_DISABLE_L2_PR ASM_CONST(0x00100000) ASM_CONST 155 arch/powerpc/include/asm/cputable.h #define CPU_FTR_DUAL_PLL_750FX ASM_CONST(0x00200000) ASM_CONST 156 arch/powerpc/include/asm/cputable.h #define CPU_FTR_NO_DPM ASM_CONST(0x00400000) ASM_CONST 157 arch/powerpc/include/asm/cputable.h #define CPU_FTR_476_DD2 ASM_CONST(0x00800000) ASM_CONST 158 arch/powerpc/include/asm/cputable.h #define CPU_FTR_NEED_COHERENT ASM_CONST(0x01000000) ASM_CONST 159 arch/powerpc/include/asm/cputable.h #define CPU_FTR_NO_BTIC ASM_CONST(0x02000000) ASM_CONST 160 arch/powerpc/include/asm/cputable.h #define CPU_FTR_PPC_LE ASM_CONST(0x04000000) ASM_CONST 161 arch/powerpc/include/asm/cputable.h #define CPU_FTR_SPE ASM_CONST(0x10000000) ASM_CONST 162 arch/powerpc/include/asm/cputable.h #define CPU_FTR_NEED_PAIRED_STWCX ASM_CONST(0x20000000) ASM_CONST 163 arch/powerpc/include/asm/cputable.h #define CPU_FTR_INDEXED_DCR ASM_CONST(0x40000000) ASM_CONST 175 arch/powerpc/include/asm/cputable.h #define LONG_ASM_CONST(x) ASM_CONST(x) ASM_CONST 17 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_PFT ASM_CONST(0x0000000000000001) ASM_CONST 18 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_TCE ASM_CONST(0x0000000000000002) ASM_CONST 19 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_SPRG0 ASM_CONST(0x0000000000000004) ASM_CONST 20 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_DABR ASM_CONST(0x0000000000000008) ASM_CONST 21 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_COPY ASM_CONST(0x0000000000000010) ASM_CONST 22 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_ASR ASM_CONST(0x0000000000000020) ASM_CONST 23 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_DEBUG ASM_CONST(0x0000000000000040) ASM_CONST 24 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_TERM ASM_CONST(0x0000000000000080) ASM_CONST 25 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_PERF ASM_CONST(0x0000000000000100) ASM_CONST 26 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_DUMP ASM_CONST(0x0000000000000200) ASM_CONST 27 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_INTERRUPT ASM_CONST(0x0000000000000400) ASM_CONST 28 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_MIGRATE ASM_CONST(0x0000000000000800) ASM_CONST 29 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_PERFMON ASM_CONST(0x0000000000001000) ASM_CONST 30 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_CRQ ASM_CONST(0x0000000000002000) ASM_CONST 31 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_VIO ASM_CONST(0x0000000000004000) ASM_CONST 32 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_RDMA ASM_CONST(0x0000000000008000) ASM_CONST 33 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_LLAN ASM_CONST(0x0000000000010000) ASM_CONST 34 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_BULK_REMOVE ASM_CONST(0x0000000000020000) ASM_CONST 35 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_XDABR ASM_CONST(0x0000000000040000) ASM_CONST 36 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_MULTITCE ASM_CONST(0x0000000000080000) ASM_CONST 37 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_SPLPAR ASM_CONST(0x0000000000100000) ASM_CONST 38 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_LPAR ASM_CONST(0x0000000000400000) ASM_CONST 39 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_PS3_LV1 ASM_CONST(0x0000000000800000) ASM_CONST 40 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_HPT_RESIZE ASM_CONST(0x0000000001000000) ASM_CONST 41 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_CMO ASM_CONST(0x0000000002000000) ASM_CONST 42 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_VPHN ASM_CONST(0x0000000004000000) ASM_CONST 43 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_XCMO ASM_CONST(0x0000000008000000) ASM_CONST 44 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_OPAL ASM_CONST(0x0000000010000000) ASM_CONST 45 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_SET_MODE ASM_CONST(0x0000000040000000) ASM_CONST 46 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_BEST_ENERGY ASM_CONST(0x0000000080000000) ASM_CONST 47 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_TYPE1_AFFINITY ASM_CONST(0x0000000100000000) ASM_CONST 48 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_PRRN ASM_CONST(0x0000000200000000) ASM_CONST 49 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_DRMEM_V2 ASM_CONST(0x0000000400000000) ASM_CONST 50 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_DRC_INFO ASM_CONST(0x0000000800000000) ASM_CONST 51 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_BLOCK_REMOVE ASM_CONST(0x0000001000000000) ASM_CONST 52 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_PAPR_SCM ASM_CONST(0x0000002000000000) ASM_CONST 53 arch/powerpc/include/asm/firmware.h #define FW_FEATURE_ULTRAVISOR ASM_CONST(0x0000004000000000) ASM_CONST 23 arch/powerpc/include/asm/iommu.h #define IOMMU_PAGE_SIZE_4K (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K) ASM_CONST 27 arch/powerpc/include/asm/iommu.h #define IOMMU_PAGE_SIZE(tblptr) (ASM_CONST(1) << (tblptr)->it_page_shift) ASM_CONST 24 arch/powerpc/include/asm/kasan.h #define KASAN_SHADOW_OFFSET ASM_CONST(CONFIG_KASAN_SHADOW_OFFSET) ASM_CONST 17 arch/powerpc/include/asm/mmu.h #define MMU_FTR_HPTE_TABLE ASM_CONST(0x00000001) ASM_CONST 18 arch/powerpc/include/asm/mmu.h #define MMU_FTR_TYPE_8xx ASM_CONST(0x00000002) ASM_CONST 19 arch/powerpc/include/asm/mmu.h #define MMU_FTR_TYPE_40x ASM_CONST(0x00000004) ASM_CONST 20 arch/powerpc/include/asm/mmu.h #define MMU_FTR_TYPE_44x ASM_CONST(0x00000008) ASM_CONST 21 arch/powerpc/include/asm/mmu.h #define MMU_FTR_TYPE_FSL_E ASM_CONST(0x00000010) ASM_CONST 22 arch/powerpc/include/asm/mmu.h #define MMU_FTR_TYPE_47x ASM_CONST(0x00000020) ASM_CONST 25 arch/powerpc/include/asm/mmu.h #define MMU_FTR_TYPE_RADIX ASM_CONST(0x00000040) ASM_CONST 34 arch/powerpc/include/asm/mmu.h #define MMU_FTR_68_BIT_VA ASM_CONST(0x00002000) ASM_CONST 39 arch/powerpc/include/asm/mmu.h #define MMU_FTR_KERNEL_RO ASM_CONST(0x00004000) ASM_CONST 45 arch/powerpc/include/asm/mmu.h #define MMU_FTR_TLBIE_CROP_VA ASM_CONST(0x00008000) ASM_CONST 48 arch/powerpc/include/asm/mmu.h #define MMU_FTR_USE_HIGH_BATS ASM_CONST(0x00010000) ASM_CONST 53 arch/powerpc/include/asm/mmu.h #define MMU_FTR_BIG_PHYS ASM_CONST(0x00020000) ASM_CONST 59 arch/powerpc/include/asm/mmu.h #define MMU_FTR_USE_TLBIVAX_BCAST ASM_CONST(0x00040000) ASM_CONST 63 arch/powerpc/include/asm/mmu.h #define MMU_FTR_USE_TLBILX ASM_CONST(0x00080000) ASM_CONST 69 arch/powerpc/include/asm/mmu.h #define MMU_FTR_LOCK_BCAST_INVAL ASM_CONST(0x00100000) ASM_CONST 75 arch/powerpc/include/asm/mmu.h #define MMU_FTR_NEED_DTLB_SW_LRU ASM_CONST(0x00200000) ASM_CONST 80 arch/powerpc/include/asm/mmu.h #define MMU_FTR_USE_TLBRSRV ASM_CONST(0x00800000) ASM_CONST 84 arch/powerpc/include/asm/mmu.h #define MMU_FTR_USE_PAIRED_MAS ASM_CONST(0x01000000) ASM_CONST 88 arch/powerpc/include/asm/mmu.h #define MMU_FTR_NO_SLBIE_B ASM_CONST(0x02000000) ASM_CONST 92 arch/powerpc/include/asm/mmu.h #define MMU_FTR_16M_PAGE ASM_CONST(0x04000000) ASM_CONST 96 arch/powerpc/include/asm/mmu.h #define MMU_FTR_TLBIEL ASM_CONST(0x08000000) ASM_CONST 100 arch/powerpc/include/asm/mmu.h #define MMU_FTR_LOCKLESS_TLBIE ASM_CONST(0x10000000) ASM_CONST 104 arch/powerpc/include/asm/mmu.h #define MMU_FTR_CI_LARGE_PAGE ASM_CONST(0x20000000) ASM_CONST 108 arch/powerpc/include/asm/mmu.h #define MMU_FTR_1T_SEGMENT ASM_CONST(0x40000000) ASM_CONST 113 arch/powerpc/include/asm/mmu.h #define MMU_FTR_RADIX_KUAP ASM_CONST(0x80000000) ASM_CONST 123 arch/powerpc/include/asm/nohash/32/mmu-44x.h #define PPC44x_EARLY_DEBUG_VIRTADDR (ASM_CONST(0xf0000000) \ ASM_CONST 124 arch/powerpc/include/asm/nohash/32/mmu-44x.h | (ASM_CONST(CONFIG_PPC_EARLY_DEBUG_44x_PHYSLOW) & 0xffff)) ASM_CONST 20 arch/powerpc/include/asm/nohash/64/pgtable.h #define PGTABLE_RANGE (ASM_CONST(1) << PGTABLE_EADDR_SIZE) ASM_CONST 28 arch/powerpc/include/asm/nohash/64/pgtable.h #define KERN_VIRT_START ASM_CONST(0x8000000000000000) ASM_CONST 29 arch/powerpc/include/asm/nohash/64/pgtable.h #define KERN_VIRT_SIZE ASM_CONST(0x0000100000000000) ASM_CONST 24 arch/powerpc/include/asm/page.h #define PAGE_SIZE (ASM_CONST(1) << PAGE_SHIFT) ASM_CONST 80 arch/powerpc/include/asm/page.h #define KERNELBASE ASM_CONST(CONFIG_KERNEL_START) ASM_CONST 81 arch/powerpc/include/asm/page.h #define PAGE_OFFSET ASM_CONST(CONFIG_PAGE_OFFSET) ASM_CONST 82 arch/powerpc/include/asm/page.h #define LOAD_OFFSET ASM_CONST((CONFIG_KERNEL_START-CONFIG_PHYSICAL_START)) ASM_CONST 98 arch/powerpc/include/asm/page.h #define PHYSICAL_START ASM_CONST(CONFIG_PHYSICAL_START) ASM_CONST 17 arch/powerpc/include/asm/page_64.h #define HW_PAGE_SIZE (ASM_CONST(1) << HW_PAGE_SHIFT) ASM_CONST 28 arch/powerpc/include/asm/page_64.h #define SID_MASK ASM_CONST(0xfffffffff) ASM_CONST 81 arch/powerpc/include/asm/ptrace.h #define STACK_FRAME_REGS_MARKER ASM_CONST(0x7265677368657265) ASM_CONST 102 arch/powerpc/include/asm/ptrace.h #define STACK_FRAME_REGS_MARKER ASM_CONST(0x72656773) ASM_CONST 276 arch/powerpc/include/asm/reg.h #define TEXASR_FC (ASM_CONST(0xFF) << TEXASR_FC_LG) ASM_CONST 427 arch/powerpc/include/asm/reg.h #define HFSCR_INTR_CAUSE (ASM_CONST(0xFF) << 56) /* interrupt cause */ ASM_CONST 430 arch/powerpc/include/asm/reg.h #define LPCR_VPM0 ASM_CONST(0x8000000000000000) ASM_CONST 431 arch/powerpc/include/asm/reg.h #define LPCR_VPM1 ASM_CONST(0x4000000000000000) ASM_CONST 432 arch/powerpc/include/asm/reg.h #define LPCR_ISL ASM_CONST(0x2000000000000000) ASM_CONST 435 arch/powerpc/include/asm/reg.h #define LPCR_DPFD (ASM_CONST(7) << LPCR_DPFD_SH) ASM_CONST 437 arch/powerpc/include/asm/reg.h #define LPCR_VRMASD (ASM_CONST(0x1f) << LPCR_VRMASD_SH) ASM_CONST 438 arch/powerpc/include/asm/reg.h #define LPCR_VRMA_L ASM_CONST(0x0008000000000000) ASM_CONST 439 arch/powerpc/include/asm/reg.h #define LPCR_VRMA_LP0 ASM_CONST(0x0001000000000000) ASM_CONST 440 arch/powerpc/include/asm/reg.h #define LPCR_VRMA_LP1 ASM_CONST(0x0000800000000000) ASM_CONST 443 arch/powerpc/include/asm/reg.h #define LPCR_ILE ASM_CONST(0x0000000002000000) /* !HV irqs set MSR:LE */ ASM_CONST 444 arch/powerpc/include/asm/reg.h #define LPCR_AIL ASM_CONST(0x0000000001800000) /* Alternate interrupt location */ ASM_CONST 445 arch/powerpc/include/asm/reg.h #define LPCR_AIL_0 ASM_CONST(0x0000000000000000) /* MMU off exception offset 0x0 */ ASM_CONST 446 arch/powerpc/include/asm/reg.h #define LPCR_AIL_3 ASM_CONST(0x0000000001800000) /* MMU on exception offset 0xc00...4xxx */ ASM_CONST 447 arch/powerpc/include/asm/reg.h #define LPCR_ONL ASM_CONST(0x0000000000040000) /* online - PURR/SPURR count */ ASM_CONST 448 arch/powerpc/include/asm/reg.h #define LPCR_LD ASM_CONST(0x0000000000020000) /* large decremeter */ ASM_CONST 449 arch/powerpc/include/asm/reg.h #define LPCR_PECE ASM_CONST(0x000000000001f000) /* powersave exit cause enable */ ASM_CONST 450 arch/powerpc/include/asm/reg.h #define LPCR_PECEDP ASM_CONST(0x0000000000010000) /* directed priv dbells cause exit */ ASM_CONST 451 arch/powerpc/include/asm/reg.h #define LPCR_PECEDH ASM_CONST(0x0000000000008000) /* directed hyp dbells cause exit */ ASM_CONST 452 arch/powerpc/include/asm/reg.h #define LPCR_PECE0 ASM_CONST(0x0000000000004000) /* ext. exceptions can cause exit */ ASM_CONST 453 arch/powerpc/include/asm/reg.h #define LPCR_PECE1 ASM_CONST(0x0000000000002000) /* decrementer can cause exit */ ASM_CONST 454 arch/powerpc/include/asm/reg.h #define LPCR_PECE2 ASM_CONST(0x0000000000001000) /* machine check etc can cause exit */ ASM_CONST 455 arch/powerpc/include/asm/reg.h #define LPCR_PECE_HVEE ASM_CONST(0x0000400000000000) /* P9 Wakeup on HV interrupts */ ASM_CONST 456 arch/powerpc/include/asm/reg.h #define LPCR_MER ASM_CONST(0x0000000000000800) /* Mediated External Exception */ ASM_CONST 458 arch/powerpc/include/asm/reg.h #define LPCR_GTSE ASM_CONST(0x0000000000000400) /* Guest Translation Shootdown Enable */ ASM_CONST 459 arch/powerpc/include/asm/reg.h #define LPCR_TC ASM_CONST(0x0000000000000200) /* Translation control */ ASM_CONST 460 arch/powerpc/include/asm/reg.h #define LPCR_HEIC ASM_CONST(0x0000000000000010) /* Hypervisor External Interrupt Control */ ASM_CONST 462 arch/powerpc/include/asm/reg.h #define LPCR_LPES0 ASM_CONST(0x0000000000000008) /* LPAR Env selector 0 */ ASM_CONST 463 arch/powerpc/include/asm/reg.h #define LPCR_LPES1 ASM_CONST(0x0000000000000004) /* LPAR Env selector 1 */ ASM_CONST 465 arch/powerpc/include/asm/reg.h #define LPCR_RMI ASM_CONST(0x0000000000000002) /* real mode is cache inhibit */ ASM_CONST 466 arch/powerpc/include/asm/reg.h #define LPCR_HVICE ASM_CONST(0x0000000000000002) /* P9: HV interrupt enable */ ASM_CONST 467 arch/powerpc/include/asm/reg.h #define LPCR_HDICE ASM_CONST(0x0000000000000001) /* Hyp Decr enable (HV,PR,EE) */ ASM_CONST 468 arch/powerpc/include/asm/reg.h #define LPCR_UPRT ASM_CONST(0x0000000000400000) /* Use Process Table (ISA 3) */ ASM_CONST 469 arch/powerpc/include/asm/reg.h #define LPCR_HR ASM_CONST(0x0000000000100000) ASM_CONST 838 arch/powerpc/include/asm/reg.h #define MMCR0_PMXE ASM_CONST(0x04000000) /* perf mon exception enable */ ASM_CONST 839 arch/powerpc/include/asm/reg.h #define MMCR0_FCECE ASM_CONST(0x02000000) /* freeze ctrs on enabled cond or event */ ASM_CONST 846 arch/powerpc/include/asm/reg.h #define MMCR0_PMCjCE ASM_CONST(0x00004000) /* PMCj count enable*/ ASM_CONST 848 arch/powerpc/include/asm/reg.h #define MMCR0_PMAO_SYNC ASM_CONST(0x00000800) /* PMU intr is synchronous */ ASM_CONST 849 arch/powerpc/include/asm/reg.h #define MMCR0_C56RUN ASM_CONST(0x00000100) /* PMC5/6 count when RUN=0 */ ASM_CONST 851 arch/powerpc/include/asm/reg.h #define MMCR0_PMAO ASM_CONST(0x00000080) ASM_CONST 69 arch/powerpc/include/asm/reg_a2.h #define TLB0_EPN_MASK ASM_CONST(0xfffffffffffff000) ASM_CONST 70 arch/powerpc/include/asm/reg_a2.h #define TLB0_CLASS_MASK ASM_CONST(0x0000000000000c00) ASM_CONST 71 arch/powerpc/include/asm/reg_a2.h #define TLB0_CLASS_00 ASM_CONST(0x0000000000000000) ASM_CONST 72 arch/powerpc/include/asm/reg_a2.h #define TLB0_CLASS_01 ASM_CONST(0x0000000000000400) ASM_CONST 73 arch/powerpc/include/asm/reg_a2.h #define TLB0_CLASS_10 ASM_CONST(0x0000000000000800) ASM_CONST 74 arch/powerpc/include/asm/reg_a2.h #define TLB0_CLASS_11 ASM_CONST(0x0000000000000c00) ASM_CONST 75 arch/powerpc/include/asm/reg_a2.h #define TLB0_V ASM_CONST(0x0000000000000200) ASM_CONST 76 arch/powerpc/include/asm/reg_a2.h #define TLB0_X ASM_CONST(0x0000000000000100) ASM_CONST 77 arch/powerpc/include/asm/reg_a2.h #define TLB0_SIZE_MASK ASM_CONST(0x00000000000000f0) ASM_CONST 78 arch/powerpc/include/asm/reg_a2.h #define TLB0_SIZE_4K ASM_CONST(0x0000000000000010) ASM_CONST 79 arch/powerpc/include/asm/reg_a2.h #define TLB0_SIZE_64K ASM_CONST(0x0000000000000030) ASM_CONST 80 arch/powerpc/include/asm/reg_a2.h #define TLB0_SIZE_1M ASM_CONST(0x0000000000000050) ASM_CONST 81 arch/powerpc/include/asm/reg_a2.h #define TLB0_SIZE_16M ASM_CONST(0x0000000000000070) ASM_CONST 82 arch/powerpc/include/asm/reg_a2.h #define TLB0_SIZE_1G ASM_CONST(0x00000000000000a0) ASM_CONST 83 arch/powerpc/include/asm/reg_a2.h #define TLB0_THDID_MASK ASM_CONST(0x000000000000000f) ASM_CONST 84 arch/powerpc/include/asm/reg_a2.h #define TLB0_THDID_0 ASM_CONST(0x0000000000000001) ASM_CONST 85 arch/powerpc/include/asm/reg_a2.h #define TLB0_THDID_1 ASM_CONST(0x0000000000000002) ASM_CONST 86 arch/powerpc/include/asm/reg_a2.h #define TLB0_THDID_2 ASM_CONST(0x0000000000000004) ASM_CONST 87 arch/powerpc/include/asm/reg_a2.h #define TLB0_THDID_3 ASM_CONST(0x0000000000000008) ASM_CONST 88 arch/powerpc/include/asm/reg_a2.h #define TLB0_THDID_ALL ASM_CONST(0x000000000000000f) ASM_CONST 90 arch/powerpc/include/asm/reg_a2.h #define TLB1_RESVATTR ASM_CONST(0x00f0000000000000) ASM_CONST 91 arch/powerpc/include/asm/reg_a2.h #define TLB1_U0 ASM_CONST(0x0008000000000000) ASM_CONST 92 arch/powerpc/include/asm/reg_a2.h #define TLB1_U1 ASM_CONST(0x0004000000000000) ASM_CONST 93 arch/powerpc/include/asm/reg_a2.h #define TLB1_U2 ASM_CONST(0x0002000000000000) ASM_CONST 94 arch/powerpc/include/asm/reg_a2.h #define TLB1_U3 ASM_CONST(0x0001000000000000) ASM_CONST 95 arch/powerpc/include/asm/reg_a2.h #define TLB1_R ASM_CONST(0x0000800000000000) ASM_CONST 96 arch/powerpc/include/asm/reg_a2.h #define TLB1_C ASM_CONST(0x0000400000000000) ASM_CONST 97 arch/powerpc/include/asm/reg_a2.h #define TLB1_RPN_MASK ASM_CONST(0x000003fffffff000) ASM_CONST 98 arch/powerpc/include/asm/reg_a2.h #define TLB1_W ASM_CONST(0x0000000000000800) ASM_CONST 99 arch/powerpc/include/asm/reg_a2.h #define TLB1_I ASM_CONST(0x0000000000000400) ASM_CONST 100 arch/powerpc/include/asm/reg_a2.h #define TLB1_M ASM_CONST(0x0000000000000200) ASM_CONST 101 arch/powerpc/include/asm/reg_a2.h #define TLB1_G ASM_CONST(0x0000000000000100) ASM_CONST 102 arch/powerpc/include/asm/reg_a2.h #define TLB1_E ASM_CONST(0x0000000000000080) ASM_CONST 103 arch/powerpc/include/asm/reg_a2.h #define TLB1_VF ASM_CONST(0x0000000000000040) ASM_CONST 104 arch/powerpc/include/asm/reg_a2.h #define TLB1_UX ASM_CONST(0x0000000000000020) ASM_CONST 105 arch/powerpc/include/asm/reg_a2.h #define TLB1_SX ASM_CONST(0x0000000000000010) ASM_CONST 106 arch/powerpc/include/asm/reg_a2.h #define TLB1_UW ASM_CONST(0x0000000000000008) ASM_CONST 107 arch/powerpc/include/asm/reg_a2.h #define TLB1_SW ASM_CONST(0x0000000000000004) ASM_CONST 108 arch/powerpc/include/asm/reg_a2.h #define TLB1_UR ASM_CONST(0x0000000000000002) ASM_CONST 109 arch/powerpc/include/asm/reg_a2.h #define TLB1_SR ASM_CONST(0x0000000000000001)