MTU4_TCI4V         95 arch/sh/kernel/cpu/sh2a/setup-sh7264.c 	INTC_IRQ(MTU4_TCI4V, 203),
MTU4_TCI4V        204 arch/sh/kernel/cpu/sh2a/setup-sh7264.c 					      MTU4_ABCD, MTU4_TCI4V } },
MTU4_TCI4V        104 arch/sh/kernel/cpu/sh2a/setup-sh7269.c 	INTC_IRQ(MTU4_TCI4V, 216),
MTU4_TCI4V        223 arch/sh/kernel/cpu/sh2a/setup-sh7269.c 	{ 0xfffe0c12, 0, 16, 4, /* IPR15 */ { MTU4_ABCD, MTU4_TCI4V,