MSYSINT1REG       434 arch/mips/vr41xx/common/icu.c 	icu1_clear(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(d->irq));
MSYSINT1REG       439 arch/mips/vr41xx/common/icu.c 	icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(d->irq));
MSYSINT1REG       619 arch/mips/vr41xx/common/icu.c 	mask1 = icu1_read(MSYSINT1REG);
MSYSINT1REG       693 arch/mips/vr41xx/common/icu.c 	icu1_write(MSYSINT1REG, 0);