MSTP32            100 arch/sh/kernel/cpu/sh2a/clock-sh7264.c 	[MSTP32] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR3, 2, 0), /* ADC */
MSTP32            129 arch/sh/kernel/cpu/sh2a/clock-sh7264.c 	CLKDEV_CON_ID("adc0", &mstp_clks[MSTP32]),
MSTP32            134 arch/sh/kernel/cpu/sh2a/clock-sh7269.c 	[MSTP32] = SH_CLK_MSTP8(&peripheral1_clk, STBCR3, 2, 0), /* ADC */
MSTP32            161 arch/sh/kernel/cpu/sh2a/clock-sh7269.c 	CLKDEV_CON_ID("adc0", &mstp_clks[MSTP32]),