MSTP000            86 arch/sh/kernel/cpu/sh4a/clock-sh7757.c 	[MSTP000] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 0, 0),
MSTP000           114 arch/sh/kernel/cpu/sh4a/clock-sh7757.c 	CLKDEV_CON_ID("riic0", &mstp_clks[MSTP000]),
MSTP000           115 arch/sh/kernel/cpu/sh4a/clock-sh7757.c 	CLKDEV_CON_ID("riic1", &mstp_clks[MSTP000]),
MSTP000           116 arch/sh/kernel/cpu/sh4a/clock-sh7757.c 	CLKDEV_CON_ID("riic2", &mstp_clks[MSTP000]),
MSTP000           117 arch/sh/kernel/cpu/sh4a/clock-sh7757.c 	CLKDEV_CON_ID("riic3", &mstp_clks[MSTP000]),
MSTP000           118 arch/sh/kernel/cpu/sh4a/clock-sh7757.c 	CLKDEV_CON_ID("riic4", &mstp_clks[MSTP000]),
MSTP000           119 arch/sh/kernel/cpu/sh4a/clock-sh7757.c 	CLKDEV_CON_ID("riic5", &mstp_clks[MSTP000]),
MSTP000           120 arch/sh/kernel/cpu/sh4a/clock-sh7757.c 	CLKDEV_CON_ID("riic6", &mstp_clks[MSTP000]),
MSTP000           121 arch/sh/kernel/cpu/sh4a/clock-sh7757.c 	CLKDEV_CON_ID("riic7", &mstp_clks[MSTP000]),
MSTP000            92 arch/sh/kernel/cpu/sh4a/clock-shx3.c 	[MSTP000] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 0, 0),
MSTP000           122 arch/sh/kernel/cpu/sh4a/clock-shx3.c 	CLKDEV_CON_ID("fe0_fck", &mstp_clks[MSTP000]),