MSR_TS_MASK       124 arch/powerpc/include/asm/reg.h #define MSR_TM_RESV(x) (((x) & MSR_TS_MASK) == MSR_TS_MASK) /* Reserved */
MSR_TS_MASK       125 arch/powerpc/include/asm/reg.h #define MSR_TM_TRANSACTIONAL(x)	(((x) & MSR_TS_MASK) == MSR_TS_T)
MSR_TS_MASK       126 arch/powerpc/include/asm/reg.h #define MSR_TM_SUSPENDED(x)	(((x) & MSR_TS_MASK) == MSR_TS_S)
MSR_TS_MASK       129 arch/powerpc/include/asm/reg.h #define MSR_TM_ACTIVE(x) (((x) & MSR_TS_MASK) != 0) /* Transaction active? */
MSR_TS_MASK       221 arch/powerpc/kernel/signal.c 		tsk->thread.regs->msr &= ~MSR_TS_MASK;
MSR_TS_MASK       856 arch/powerpc/kernel/signal_32.c 	regs->msr = (regs->msr & ~MSR_TS_MASK) | (msr_hi & MSR_TS_MASK);
MSR_TS_MASK      1214 arch/powerpc/kernel/signal_32.c 		regs->msr &= ~MSR_TS_MASK;
MSR_TS_MASK       559 arch/powerpc/kernel/signal_64.c 	regs->msr |= msr & MSR_TS_MASK;
MSR_TS_MASK       762 arch/powerpc/kernel/signal_64.c 	regs->msr &= ~MSR_TS_MASK;
MSR_TS_MASK       794 arch/powerpc/kernel/signal_64.c 		current->thread.regs->msr &= ~MSR_TS_MASK;
MSR_TS_MASK        36 arch/powerpc/kvm/book3s_64_mmu.c 		msr |= cur_msr & MSR_TS_MASK;
MSR_TS_MASK       286 arch/powerpc/kvm/book3s_64_mmu_hv.c 		msr |= vcpu->arch.shregs.msr & MSR_TS_MASK;
MSR_TS_MASK       134 arch/powerpc/kvm/book3s_emulate.c 		(((guest_msr & MSR_TS_MASK) >> (MSR_TS_S_LG - 1))
MSR_TS_MASK       164 arch/powerpc/kvm/book3s_emulate.c 	guest_msr &= ~(MSR_TS_MASK);
MSR_TS_MASK       189 arch/powerpc/kvm/book3s_emulate.c 	guest_msr &= ~(MSR_TS_MASK);
MSR_TS_MASK       213 arch/powerpc/kvm/book3s_emulate.c 		(((guest_msr & MSR_TS_MASK) >> (MSR_TS_S_LG - 1))
MSR_TS_MASK       347 arch/powerpc/kvm/book3s_hv.c 	if ((msr & MSR_TS_MASK) == MSR_TS_MASK)
MSR_TS_MASK       348 arch/powerpc/kvm/book3s_hv.c 		msr &= ~MSR_TS_MASK;
MSR_TS_MASK       309 arch/powerpc/kvm/book3s_hv_nested.c 	vcpu->arch.shregs.msr = saved_l1_regs.msr & ~MSR_TS_MASK;
MSR_TS_MASK       311 arch/powerpc/kvm/book3s_hv_nested.c 	if (l2_regs.msr & MSR_TS_MASK)
MSR_TS_MASK        88 arch/powerpc/kvm/book3s_hv_tm.c 		msr = (msr & ~MSR_TS_MASK) | MSR_TS_T;
MSR_TS_MASK       131 arch/powerpc/kvm/book3s_hv_tm.c 			(((msr & MSR_TS_MASK) >> MSR_TS_S_LG) << 29);
MSR_TS_MASK       135 arch/powerpc/kvm/book3s_hv_tm.c 				msr = (msr & ~MSR_TS_MASK) | MSR_TS_T;
MSR_TS_MASK       138 arch/powerpc/kvm/book3s_hv_tm.c 				msr = (msr & ~MSR_TS_MASK) | MSR_TS_S;
MSR_TS_MASK       175 arch/powerpc/kvm/book3s_hv_tm.c 			(((msr & MSR_TS_MASK) >> MSR_TS_S_LG) << 29);
MSR_TS_MASK       176 arch/powerpc/kvm/book3s_hv_tm.c 		vcpu->arch.shregs.msr &= ~MSR_TS_MASK;
MSR_TS_MASK       205 arch/powerpc/kvm/book3s_hv_tm.c 			(((msr & MSR_TS_MASK) >> MSR_TS_S_LG) << 29);
MSR_TS_MASK        56 arch/powerpc/kvm/book3s_hv_tm_builtin.c 		msr = (msr & ~MSR_TS_MASK) | MSR_TS_T;
MSR_TS_MASK        87 arch/powerpc/kvm/book3s_hv_tm_builtin.c 			vcpu->arch.shregs.msr = (msr & ~MSR_TS_MASK) | MSR_TS_T;
MSR_TS_MASK       103 arch/powerpc/kvm/book3s_hv_tm_builtin.c 	vcpu->arch.shregs.msr &= ~MSR_TS_MASK;	/* go to N state */
MSR_TS_MASK       196 arch/powerpc/kvm/book3s_pr.c 		MSR_TM | MSR_TS_MASK;
MSR_TS_MASK       284 arch/powerpc/kvm/book3s_pr.c 		(vcpu->arch.shadow_srr1 & (MSR_TS_MASK)) !=
MSR_TS_MASK       285 arch/powerpc/kvm/book3s_pr.c 				(old_msr & (MSR_TS_MASK)))) {
MSR_TS_MASK       286 arch/powerpc/kvm/book3s_pr.c 		old_msr &= ~(MSR_TS_MASK);
MSR_TS_MASK       287 arch/powerpc/kvm/book3s_pr.c 		old_msr |= (vcpu->arch.shadow_srr1 & (MSR_TS_MASK));