MSR_P4_CRU_ESCR5 1141 arch/x86/events/intel/p4.c 	P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_CRU_ESCR5),
MSR_P4_CRU_ESCR5  470 arch/x86/oprofile/op_model_p4.c 		if (reserve_evntsel_nmi(MSR_P4_CRU_ESCR5))
MSR_P4_CRU_ESCR5  471 arch/x86/oprofile/op_model_p4.c 			msrs->controls[i++].addr = MSR_P4_CRU_ESCR5;
MSR_P4_CRU_ESCR5  484 arch/x86/oprofile/op_model_p4.c 		if (reserve_evntsel_nmi(MSR_P4_CRU_ESCR5)) {
MSR_P4_CRU_ESCR5  485 arch/x86/oprofile/op_model_p4.c 			msrs->controls[i++].addr = MSR_P4_CRU_ESCR5;
MSR_P4_CRU_ESCR5  486 arch/x86/oprofile/op_model_p4.c 			msrs->controls[i++].addr = MSR_P4_CRU_ESCR5;