MSR_P4_CRU_ESCR3  407 arch/x86/events/intel/p4.c 		.escr_msr	= { MSR_P4_CRU_ESCR2, MSR_P4_CRU_ESCR3 },
MSR_P4_CRU_ESCR3  415 arch/x86/events/intel/p4.c 		.escr_msr	= { MSR_P4_CRU_ESCR2, MSR_P4_CRU_ESCR3 },
MSR_P4_CRU_ESCR3  429 arch/x86/events/intel/p4.c 		.escr_msr	= { MSR_P4_CRU_ESCR2, MSR_P4_CRU_ESCR3 },
MSR_P4_CRU_ESCR3  463 arch/x86/events/intel/p4.c 		.escr_msr	= { MSR_P4_CRU_ESCR2, MSR_P4_CRU_ESCR3 },
MSR_P4_CRU_ESCR3  480 arch/x86/events/intel/p4.c 		.escr_msr	= { MSR_P4_CRU_ESCR2, MSR_P4_CRU_ESCR3 },
MSR_P4_CRU_ESCR3  491 arch/x86/events/intel/p4.c 		.escr_msr	= { MSR_P4_CRU_ESCR2, MSR_P4_CRU_ESCR3 },
MSR_P4_CRU_ESCR3 1139 arch/x86/events/intel/p4.c 	P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_CRU_ESCR3),
MSR_P4_CRU_ESCR3  112 arch/x86/oprofile/op_model_p4.c 		  {CTR_IQ_5, MSR_P4_CRU_ESCR3} }
MSR_P4_CRU_ESCR3  214 arch/x86/oprofile/op_model_p4.c 		  { CTR_IQ_5, MSR_P4_CRU_ESCR3} }
MSR_P4_CRU_ESCR3  274 arch/x86/oprofile/op_model_p4.c 		  { CTR_IQ_5, MSR_P4_CRU_ESCR3} }
MSR_P4_CRU_ESCR3  298 arch/x86/oprofile/op_model_p4.c 		  { CTR_IQ_5, MSR_P4_CRU_ESCR3} }
MSR_P4_CRU_ESCR3  304 arch/x86/oprofile/op_model_p4.c 		  { CTR_IQ_5, MSR_P4_CRU_ESCR3} }
MSR_P4_CRU_ESCR3  310 arch/x86/oprofile/op_model_p4.c 		  { CTR_IQ_5, MSR_P4_CRU_ESCR3} }
MSR_P4_CRU_ESCR3  461 arch/x86/oprofile/op_model_p4.c 	     addr <= MSR_P4_CRU_ESCR3; ++i, addr += addr_increment()) {