MSR_P4_CRU_ESCR0  437 arch/x86/events/intel/p4.c 		.escr_msr	= { MSR_P4_CRU_ESCR0, MSR_P4_CRU_ESCR1 },
MSR_P4_CRU_ESCR0  447 arch/x86/events/intel/p4.c 		.escr_msr	= { MSR_P4_CRU_ESCR0, MSR_P4_CRU_ESCR1 },
MSR_P4_CRU_ESCR0  473 arch/x86/events/intel/p4.c 		.escr_msr	= { MSR_P4_CRU_ESCR0, MSR_P4_CRU_ESCR1 },
MSR_P4_CRU_ESCR0  500 arch/x86/events/intel/p4.c 		.escr_msr	= { MSR_P4_CRU_ESCR0, MSR_P4_CRU_ESCR1 },
MSR_P4_CRU_ESCR0 1136 arch/x86/events/intel/p4.c 	P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_CRU_ESCR0),
MSR_P4_CRU_ESCR0  117 arch/x86/oprofile/op_model_p4.c 		{ { CTR_IQ_4, MSR_P4_CRU_ESCR0},
MSR_P4_CRU_ESCR0  315 arch/x86/oprofile/op_model_p4.c 		{ { CTR_IQ_4, MSR_P4_CRU_ESCR0},
MSR_P4_CRU_ESCR0  321 arch/x86/oprofile/op_model_p4.c 		{ { CTR_IQ_4, MSR_P4_CRU_ESCR0},