MSR_IA32_RTIT_CTL  507 arch/x86/events/intel/pt.c 		wrmsrl(MSR_IA32_RTIT_CTL, reg);
MSR_IA32_RTIT_CTL  521 arch/x86/events/intel/pt.c 		wrmsrl(MSR_IA32_RTIT_CTL, ctl);
MSR_IA32_RTIT_CTL 1418 arch/x86/events/intel/pt.c 		wrmsrl(MSR_IA32_RTIT_CTL, event->hw.config);
MSR_IA32_RTIT_CTL 1585 arch/x86/events/intel/pt.c 		ret = rdmsrl_safe_on_cpu(cpu, MSR_IA32_RTIT_CTL, &ctl);
MSR_IA32_RTIT_CTL 1058 arch/x86/kvm/vmx/vmx.c 	rdmsrl(MSR_IA32_RTIT_CTL, vmx->pt_desc.host.ctl);
MSR_IA32_RTIT_CTL 1060 arch/x86/kvm/vmx/vmx.c 		wrmsrl(MSR_IA32_RTIT_CTL, 0);
MSR_IA32_RTIT_CTL 1077 arch/x86/kvm/vmx/vmx.c 	wrmsrl(MSR_IA32_RTIT_CTL, vmx->pt_desc.host.ctl);
MSR_IA32_RTIT_CTL 1822 arch/x86/kvm/vmx/vmx.c 	case MSR_IA32_RTIT_CTL:
MSR_IA32_RTIT_CTL 2076 arch/x86/kvm/vmx/vmx.c 	case MSR_IA32_RTIT_CTL:
MSR_IA32_RTIT_CTL 1211 arch/x86/kvm/x86.c 	MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
MSR_IA32_RTIT_CTL 5229 arch/x86/kvm/x86.c 		case MSR_IA32_RTIT_CTL: