MSR_IA32_RTIT_ADDR0_A  407 arch/x86/events/intel/pt.c 		.msr_a	 = MSR_IA32_RTIT_ADDR0_A,
MSR_IA32_RTIT_ADDR0_A 1030 arch/x86/kvm/vmx/vmx.c 		wrmsrl(MSR_IA32_RTIT_ADDR0_A + i * 2, ctx->addr_a[i]);
MSR_IA32_RTIT_ADDR0_A 1044 arch/x86/kvm/vmx/vmx.c 		rdmsrl(MSR_IA32_RTIT_ADDR0_A + i * 2, ctx->addr_a[i]);
MSR_IA32_RTIT_ADDR0_A 1857 arch/x86/kvm/vmx/vmx.c 	case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
MSR_IA32_RTIT_ADDR0_A 1858 arch/x86/kvm/vmx/vmx.c 		index = msr_info->index - MSR_IA32_RTIT_ADDR0_A;
MSR_IA32_RTIT_ADDR0_A 2121 arch/x86/kvm/vmx/vmx.c 	case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
MSR_IA32_RTIT_ADDR0_A 2122 arch/x86/kvm/vmx/vmx.c 		index = msr_info->index - MSR_IA32_RTIT_ADDR0_A;
MSR_IA32_RTIT_ADDR0_A 3729 arch/x86/kvm/vmx/vmx.c 			MSR_IA32_RTIT_ADDR0_A + i * 2, MSR_TYPE_RW, flag);
MSR_IA32_RTIT_ADDR0_A 1213 arch/x86/kvm/x86.c 	MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
MSR_IA32_RTIT_ADDR0_A 5246 arch/x86/kvm/x86.c 		case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B: {
MSR_IA32_RTIT_ADDR0_A 5248 arch/x86/kvm/x86.c 				msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=