MSR_IA32_CR_PAT    43 arch/x86/kvm/mtrr.c 	case MSR_IA32_CR_PAT:
MSR_IA32_CR_PAT    62 arch/x86/kvm/mtrr.c 	if (msr == MSR_IA32_CR_PAT) {
MSR_IA32_CR_PAT   316 arch/x86/kvm/mtrr.c 	if (msr == MSR_IA32_CR_PAT || !tdp_enabled ||
MSR_IA32_CR_PAT   388 arch/x86/kvm/mtrr.c 	else if (msr == MSR_IA32_CR_PAT)
MSR_IA32_CR_PAT   421 arch/x86/kvm/mtrr.c 	else if (msr == MSR_IA32_CR_PAT)
MSR_IA32_CR_PAT  4309 arch/x86/kvm/svm.c 	case MSR_IA32_CR_PAT:
MSR_IA32_CR_PAT  4310 arch/x86/kvm/svm.c 		if (!kvm_mtrr_valid(vcpu, MSR_IA32_CR_PAT, data))
MSR_IA32_CR_PAT  2016 arch/x86/kvm/vmx/vmx.c 	case MSR_IA32_CR_PAT:
MSR_IA32_CR_PAT  3906 arch/x86/kvm/vmx/vmx.c 		rdmsr(MSR_IA32_CR_PAT, low32, high32);
MSR_IA32_CR_PAT  1208 arch/x86/kvm/x86.c 	MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
MSR_IA32_CR_PAT   222 arch/x86/mm/pat.c 	rdmsrl(MSR_IA32_CR_PAT, tmp_pat);
MSR_IA32_CR_PAT   228 arch/x86/mm/pat.c 	wrmsrl(MSR_IA32_CR_PAT, pat);
MSR_IA32_CR_PAT   244 arch/x86/mm/pat.c 	wrmsrl(MSR_IA32_CR_PAT, pat);
MSR_IA32_CR_PAT   264 arch/x86/mm/pat.c 		rdmsrl(MSR_IA32_CR_PAT, pat);
MSR_IA32_CR_PAT   279 tools/testing/selftests/kvm/lib/x86_64/vmx.c 		vmwrite(HOST_IA32_PAT, rdmsr(MSR_IA32_CR_PAT));