MSR_F15H_PERF_CTR  951 arch/x86/events/amd/core.c 	x86_pmu.perfctr		= MSR_F15H_PERF_CTR;
MSR_F15H_PERF_CTR  464 arch/x86/include/asm/msr-index.h #define MSR_F15H_PERF_CTR0		MSR_F15H_PERF_CTR
MSR_F15H_PERF_CTR  465 arch/x86/include/asm/msr-index.h #define MSR_F15H_PERF_CTR1		(MSR_F15H_PERF_CTR + 2)
MSR_F15H_PERF_CTR  466 arch/x86/include/asm/msr-index.h #define MSR_F15H_PERF_CTR2		(MSR_F15H_PERF_CTR + 4)
MSR_F15H_PERF_CTR  467 arch/x86/include/asm/msr-index.h #define MSR_F15H_PERF_CTR3		(MSR_F15H_PERF_CTR + 6)
MSR_F15H_PERF_CTR  468 arch/x86/include/asm/msr-index.h #define MSR_F15H_PERF_CTR4		(MSR_F15H_PERF_CTR + 8)
MSR_F15H_PERF_CTR  469 arch/x86/include/asm/msr-index.h #define MSR_F15H_PERF_CTR5		(MSR_F15H_PERF_CTR + 10)
MSR_F15H_PERF_CTR   51 arch/x86/kernel/cpu/perfctr-watchdog.c 		if (msr >= MSR_F15H_PERF_CTR)
MSR_F15H_PERF_CTR   52 arch/x86/kernel/cpu/perfctr-watchdog.c 			return (msr - MSR_F15H_PERF_CTR) >> 1;
MSR_F15H_PERF_CTR   53 arch/x86/kvm/pmu_amd.c 			return MSR_F15H_PERF_CTR;
MSR_F15H_PERF_CTR  315 arch/x86/oprofile/op_model_amd.c 			msrs->counters[i].addr = MSR_F15H_PERF_CTR + (i << 1);
MSR_F15H_PERF_CTR   77 arch/x86/xen/pmu.c 			amd_counters_base = MSR_F15H_PERF_CTR;
MSR_F15H_PERF_CTR  119 arch/x86/xen/pmu.c 		return MSR_F15H_PERF_CTR + (addr - MSR_K7_PERFCTR0);
MSR_F15H_PERF_CTR  135 arch/x86/xen/pmu.c 	     msr < MSR_F15H_PERF_CTR + (amd_num_counters * 2)) ||