MSR_ATAC_BASE      37 drivers/ata/pata_cs5535.c #define ATAC_GLD_MSR_CAP 	(MSR_ATAC_BASE+0)
MSR_ATAC_BASE      38 drivers/ata/pata_cs5535.c #define ATAC_GLD_MSR_CONFIG    (MSR_ATAC_BASE+0x01)
MSR_ATAC_BASE      39 drivers/ata/pata_cs5535.c #define ATAC_GLD_MSR_SMI       (MSR_ATAC_BASE+0x02)
MSR_ATAC_BASE      40 drivers/ata/pata_cs5535.c #define ATAC_GLD_MSR_ERROR     (MSR_ATAC_BASE+0x03)
MSR_ATAC_BASE      41 drivers/ata/pata_cs5535.c #define ATAC_GLD_MSR_PM        (MSR_ATAC_BASE+0x04)
MSR_ATAC_BASE      42 drivers/ata/pata_cs5535.c #define ATAC_GLD_MSR_DIAG      (MSR_ATAC_BASE+0x05)
MSR_ATAC_BASE      43 drivers/ata/pata_cs5535.c #define ATAC_IO_BAR            (MSR_ATAC_BASE+0x08)
MSR_ATAC_BASE      44 drivers/ata/pata_cs5535.c #define ATAC_RESET             (MSR_ATAC_BASE+0x10)
MSR_ATAC_BASE      45 drivers/ata/pata_cs5535.c #define ATAC_CH0D0_PIO         (MSR_ATAC_BASE+0x20)
MSR_ATAC_BASE      46 drivers/ata/pata_cs5535.c #define ATAC_CH0D0_DMA         (MSR_ATAC_BASE+0x21)
MSR_ATAC_BASE      47 drivers/ata/pata_cs5535.c #define ATAC_CH0D1_PIO         (MSR_ATAC_BASE+0x22)
MSR_ATAC_BASE      48 drivers/ata/pata_cs5535.c #define ATAC_CH0D1_DMA         (MSR_ATAC_BASE+0x23)
MSR_ATAC_BASE      49 drivers/ata/pata_cs5535.c #define ATAC_PCI_ABRTERR       (MSR_ATAC_BASE+0x24)
MSR_ATAC_BASE      29 drivers/ide/cs5535.c #define ATAC_GLD_MSR_CAP	(MSR_ATAC_BASE+0)
MSR_ATAC_BASE      30 drivers/ide/cs5535.c #define ATAC_GLD_MSR_CONFIG	(MSR_ATAC_BASE+0x01)
MSR_ATAC_BASE      31 drivers/ide/cs5535.c #define ATAC_GLD_MSR_SMI	(MSR_ATAC_BASE+0x02)
MSR_ATAC_BASE      32 drivers/ide/cs5535.c #define ATAC_GLD_MSR_ERROR	(MSR_ATAC_BASE+0x03)
MSR_ATAC_BASE      33 drivers/ide/cs5535.c #define ATAC_GLD_MSR_PM		(MSR_ATAC_BASE+0x04)
MSR_ATAC_BASE      34 drivers/ide/cs5535.c #define ATAC_GLD_MSR_DIAG	(MSR_ATAC_BASE+0x05)
MSR_ATAC_BASE      35 drivers/ide/cs5535.c #define ATAC_IO_BAR		(MSR_ATAC_BASE+0x08)
MSR_ATAC_BASE      36 drivers/ide/cs5535.c #define ATAC_RESET		(MSR_ATAC_BASE+0x10)
MSR_ATAC_BASE      37 drivers/ide/cs5535.c #define ATAC_CH0D0_PIO		(MSR_ATAC_BASE+0x20)
MSR_ATAC_BASE      38 drivers/ide/cs5535.c #define ATAC_CH0D0_DMA		(MSR_ATAC_BASE+0x21)
MSR_ATAC_BASE      39 drivers/ide/cs5535.c #define ATAC_CH0D1_PIO		(MSR_ATAC_BASE+0x22)
MSR_ATAC_BASE      40 drivers/ide/cs5535.c #define ATAC_CH0D1_DMA		(MSR_ATAC_BASE+0x23)
MSR_ATAC_BASE      41 drivers/ide/cs5535.c #define ATAC_PCI_ABRTERR	(MSR_ATAC_BASE+0x24)