MSK 281 arch/mips/include/asm/gt64120.h #define GT_CPU_ENDIAN_MSK (MSK(1) << GT_CPU_ENDIAN_SHF) MSK 284 arch/mips/include/asm/gt64120.h #define GT_CPU_WR_MSK (MSK(1) << GT_CPU_WR_SHF) MSK 292 arch/mips/include/asm/gt64120.h #define GT_PCI_LD_MSK (MSK(15) << GT_PCI_LD_SHF) MSK 294 arch/mips/include/asm/gt64120.h #define GT_PCI_HD_MSK (MSK(7) << GT_PCI_HD_SHF) MSK 296 arch/mips/include/asm/gt64120.h #define GT_PCI_REMAP_MSK (MSK(11) << GT_PCI_REMAP_SHF) MSK 300 arch/mips/include/asm/gt64120.h #define GT_CFGADDR_CFGEN_MSK (MSK(1) << GT_CFGADDR_CFGEN_SHF) MSK 304 arch/mips/include/asm/gt64120.h #define GT_CFGADDR_BUSNUM_MSK (MSK(8) << GT_CFGADDR_BUSNUM_SHF) MSK 307 arch/mips/include/asm/gt64120.h #define GT_CFGADDR_DEVNUM_MSK (MSK(5) << GT_CFGADDR_DEVNUM_SHF) MSK 310 arch/mips/include/asm/gt64120.h #define GT_CFGADDR_FUNCNUM_MSK (MSK(3) << GT_CFGADDR_FUNCNUM_SHF) MSK 313 arch/mips/include/asm/gt64120.h #define GT_CFGADDR_REGNUM_MSK (MSK(6) << GT_CFGADDR_REGNUM_SHF) MSK 317 arch/mips/include/asm/gt64120.h #define GT_SDRAM_BM_ORDER_MSK (MSK(1) << GT_SDRAM_BM_ORDER_SHF) MSK 326 arch/mips/include/asm/gt64120.h #define GT_SDRAM_ADDRDECODE_ADDR_MSK (MSK(3) << GT_SDRAM_ADDRDECODE_ADDR_SHF) MSK 338 arch/mips/include/asm/gt64120.h #define GT_SDRAM_B0_CASLAT_MSK (MSK(2) << GT_SDRAM_B0__SHF) MSK 343 arch/mips/include/asm/gt64120.h #define GT_SDRAM_B0_FTDIS_MSK (MSK(1) << GT_SDRAM_B0_FTDIS_SHF) MSK 347 arch/mips/include/asm/gt64120.h #define GT_SDRAM_B0_SRASPRCHG_MSK (MSK(1) << GT_SDRAM_B0_SRASPRCHG_SHF) MSK 353 arch/mips/include/asm/gt64120.h #define GT_SDRAM_B0_B0COMPAB_MSK (MSK(1) << GT_SDRAM_B0_B0COMPAB_SHF) MSK 357 arch/mips/include/asm/gt64120.h #define GT_SDRAM_B0_64BITINT_MSK (MSK(1) << GT_SDRAM_B0_64BITINT_SHF) MSK 363 arch/mips/include/asm/gt64120.h #define GT_SDRAM_B0_BW_MSK (MSK(1) << GT_SDRAM_B0_BW_SHF) MSK 369 arch/mips/include/asm/gt64120.h #define GT_SDRAM_B0_BLODD_MSK (MSK(1) << GT_SDRAM_B0_BLODD_SHF) MSK 373 arch/mips/include/asm/gt64120.h #define GT_SDRAM_B0_PAR_MSK (MSK(1) << GT_SDRAM_B0_PAR_SHF) MSK 377 arch/mips/include/asm/gt64120.h #define GT_SDRAM_B0_BYPASS_MSK (MSK(1) << GT_SDRAM_B0_BYPASS_SHF) MSK 381 arch/mips/include/asm/gt64120.h #define GT_SDRAM_B0_SRAS2SCAS_MSK (MSK(1) << GT_SDRAM_B0_SRAS2SCAS_SHF) MSK 387 arch/mips/include/asm/gt64120.h #define GT_SDRAM_B0_SIZE_MSK (MSK(1) << GT_SDRAM_B0_SIZE_SHF) MSK 393 arch/mips/include/asm/gt64120.h #define GT_SDRAM_B0_EXTPAR_MSK (MSK(1) << GT_SDRAM_B0_EXTPAR_SHF) MSK 397 arch/mips/include/asm/gt64120.h #define GT_SDRAM_B0_BLEN_MSK (MSK(1) << GT_SDRAM_B0_BLEN_SHF) MSK 404 arch/mips/include/asm/gt64120.h #define GT_SDRAM_CFG_REFINT_MSK (MSK(14) << GT_SDRAM_CFG_REFINT_SHF) MSK 407 arch/mips/include/asm/gt64120.h #define GT_SDRAM_CFG_NINTERLEAVE_MSK (MSK(1) << GT_SDRAM_CFG_NINTERLEAVE_SHF) MSK 411 arch/mips/include/asm/gt64120.h #define GT_SDRAM_CFG_RMW_MSK (MSK(1) << GT_SDRAM_CFG_RMW_SHF) MSK 415 arch/mips/include/asm/gt64120.h #define GT_SDRAM_CFG_NONSTAGREF_MSK (MSK(1) << GT_SDRAM_CFG_NONSTAGREF_SHF) MSK 419 arch/mips/include/asm/gt64120.h #define GT_SDRAM_CFG_DUPCNTL_MSK (MSK(1) << GT_SDRAM_CFG_DUPCNTL_SHF) MSK 423 arch/mips/include/asm/gt64120.h #define GT_SDRAM_CFG_DUPBA_MSK (MSK(1) << GT_SDRAM_CFG_DUPBA_SHF) MSK 427 arch/mips/include/asm/gt64120.h #define GT_SDRAM_CFG_DUPEOT0_MSK (MSK(1) << GT_SDRAM_CFG_DUPEOT0_SHF) MSK 431 arch/mips/include/asm/gt64120.h #define GT_SDRAM_CFG_DUPEOT1_MSK (MSK(1) << GT_SDRAM_CFG_DUPEOT1_SHF) MSK 435 arch/mips/include/asm/gt64120.h #define GT_SDRAM_OPMODE_OP_MSK (MSK(3) << GT_SDRAM_OPMODE_OP_SHF) MSK 443 arch/mips/include/asm/gt64120.h #define GT_TC_CONTROL_ENTC0_MSK (MSK(1) << GT_TC_CONTROL_ENTC0_SHF) MSK 446 arch/mips/include/asm/gt64120.h #define GT_TC_CONTROL_SELTC0_MSK (MSK(1) << GT_TC_CONTROL_SELTC0_SHF) MSK 451 arch/mips/include/asm/gt64120.h #define GT_PCI0_BARE_SWSCS3BOOTDIS_MSK (MSK(1) << GT_PCI0_BARE_SWSCS3BOOTDIS_SHF) MSK 455 arch/mips/include/asm/gt64120.h #define GT_PCI0_BARE_SWSCS32DIS_MSK (MSK(1) << GT_PCI0_BARE_SWSCS32DIS_SHF) MSK 459 arch/mips/include/asm/gt64120.h #define GT_PCI0_BARE_SWSCS10DIS_MSK (MSK(1) << GT_PCI0_BARE_SWSCS10DIS_SHF) MSK 463 arch/mips/include/asm/gt64120.h #define GT_PCI0_BARE_INTIODIS_MSK (MSK(1) << GT_PCI0_BARE_INTIODIS_SHF) MSK 467 arch/mips/include/asm/gt64120.h #define GT_PCI0_BARE_INTMEMDIS_MSK (MSK(1) << GT_PCI0_BARE_INTMEMDIS_SHF) MSK 471 arch/mips/include/asm/gt64120.h #define GT_PCI0_BARE_CS3BOOTDIS_MSK (MSK(1) << GT_PCI0_BARE_CS3BOOTDIS_SHF) MSK 475 arch/mips/include/asm/gt64120.h #define GT_PCI0_BARE_CS20DIS_MSK (MSK(1) << GT_PCI0_BARE_CS20DIS_SHF) MSK 479 arch/mips/include/asm/gt64120.h #define GT_PCI0_BARE_SCS32DIS_MSK (MSK(1) << GT_PCI0_BARE_SCS32DIS_SHF) MSK 483 arch/mips/include/asm/gt64120.h #define GT_PCI0_BARE_SCS10DIS_MSK (MSK(1) << GT_PCI0_BARE_SCS10DIS_SHF) MSK 488 arch/mips/include/asm/gt64120.h #define GT_INTRCAUSE_MASABORT0_MSK (MSK(1) << GT_INTRCAUSE_MASABORT0_SHF) MSK 492 arch/mips/include/asm/gt64120.h #define GT_INTRCAUSE_TARABORT0_MSK (MSK(1) << GT_INTRCAUSE_TARABORT0_SHF) MSK 497 arch/mips/include/asm/gt64120.h #define GT_PCI0_CFGADDR_REGNUM_MSK (MSK(6) << GT_PCI0_CFGADDR_REGNUM_SHF) MSK 499 arch/mips/include/asm/gt64120.h #define GT_PCI0_CFGADDR_FUNCTNUM_MSK (MSK(3) << GT_PCI0_CFGADDR_FUNCTNUM_SHF) MSK 501 arch/mips/include/asm/gt64120.h #define GT_PCI0_CFGADDR_DEVNUM_MSK (MSK(5) << GT_PCI0_CFGADDR_DEVNUM_SHF) MSK 503 arch/mips/include/asm/gt64120.h #define GT_PCI0_CFGADDR_BUSNUM_MSK (MSK(8) << GT_PCI0_CFGADDR_BUSNUM_SHF) MSK 505 arch/mips/include/asm/gt64120.h #define GT_PCI0_CFGADDR_CONFIGEN_MSK (MSK(1) << GT_PCI0_CFGADDR_CONFIGEN_SHF) MSK 509 arch/mips/include/asm/gt64120.h #define GT_PCI0_CMD_MBYTESWAP_MSK (MSK(1) << GT_PCI0_CMD_MBYTESWAP_SHF) MSK 512 arch/mips/include/asm/gt64120.h #define GT_PCI0_CMD_MWORDSWAP_MSK (MSK(1) << GT_PCI0_CMD_MWORDSWAP_SHF) MSK 515 arch/mips/include/asm/gt64120.h #define GT_PCI0_CMD_SBYTESWAP_MSK (MSK(1) << GT_PCI0_CMD_SBYTESWAP_SHF) MSK 518 arch/mips/include/asm/gt64120.h #define GT_PCI0_CMD_SWORDSWAP_MSK (MSK(1) << GT_PCI0_CMD_SWORDSWAP_SHF) MSK 522 arch/mips/include/asm/gt64120.h #define GT_INTR_T0EXP_MSK (MSK(1) << GT_INTR_T0EXP_SHF) MSK 525 arch/mips/include/asm/gt64120.h #define GT_INTR_RETRYCTR0_MSK (MSK(1) << GT_INTR_RETRYCTR0_SHF)