MSCC_PHY_WOL_MAC_CONTROL  642 drivers/net/phy/mscc.c 	reg_val = __phy_read(phydev, MSCC_PHY_WOL_MAC_CONTROL);
MSCC_PHY_WOL_MAC_CONTROL  647 drivers/net/phy/mscc.c 	__phy_write(phydev, MSCC_PHY_WOL_MAC_CONTROL, reg_val);
MSCC_PHY_WOL_MAC_CONTROL  691 drivers/net/phy/mscc.c 	reg_val = __phy_read(phydev, MSCC_PHY_WOL_MAC_CONTROL);
MSCC_PHY_WOL_MAC_CONTROL  802 drivers/net/phy/mscc.c 			      MSCC_PHY_WOL_MAC_CONTROL, EDGE_RATE_CNTL_MASK,