MPIDR_LEVEL_SHIFT   22 arch/arm64/include/asm/cputype.h 	((mpidr >> MPIDR_LEVEL_SHIFT(level)) & MPIDR_LEVEL_MASK)
MPIDR_LEVEL_SHIFT  148 arch/arm64/kernel/setup.c 	mpidr_hash.shift_aff[0] = MPIDR_LEVEL_SHIFT(0) + fs[0];
MPIDR_LEVEL_SHIFT  149 arch/arm64/kernel/setup.c 	mpidr_hash.shift_aff[1] = MPIDR_LEVEL_SHIFT(1) + fs[1] - bits[0];
MPIDR_LEVEL_SHIFT  150 arch/arm64/kernel/setup.c 	mpidr_hash.shift_aff[2] = MPIDR_LEVEL_SHIFT(2) + fs[2] -
MPIDR_LEVEL_SHIFT  152 arch/arm64/kernel/setup.c 	mpidr_hash.shift_aff[3] = MPIDR_LEVEL_SHIFT(3) +
MPIDR_LEVEL_SHIFT  618 arch/arm64/kvm/sys_regs.c 	mpidr = (vcpu->vcpu_id & 0x0f) << MPIDR_LEVEL_SHIFT(0);
MPIDR_LEVEL_SHIFT  619 arch/arm64/kvm/sys_regs.c 	mpidr |= ((vcpu->vcpu_id >> 4) & 0xff) << MPIDR_LEVEL_SHIFT(1);
MPIDR_LEVEL_SHIFT  620 arch/arm64/kvm/sys_regs.c 	mpidr |= ((vcpu->vcpu_id >> 12) & 0xff) << MPIDR_LEVEL_SHIFT(2);
MPIDR_LEVEL_SHIFT  870 virt/kvm/arm/vgic/vgic-mmio-v3.c 	>> ICC_SGI1R_AFFINITY_## level ##_SHIFT) << MPIDR_LEVEL_SHIFT(level))
MPIDR_LEVEL_SHIFT   33 virt/kvm/arm/vgic/vgic.h 	>> VGIC_AFFINITY_## level ##_SHIFT) << MPIDR_LEVEL_SHIFT(level))