MODULO             21 arch/ia64/lib/idiv32.S #ifdef MODULO
MODULO             52 arch/ia64/lib/idiv32.S #ifdef MODULO
MODULO             66 arch/ia64/lib/idiv32.S #ifdef MODULO
MODULO             72 arch/ia64/lib/idiv32.S #ifdef MODULO
MODULO             79 arch/ia64/lib/idiv32.S #ifdef MODULO
MODULO             21 arch/ia64/lib/idiv64.S #ifdef MODULO
MODULO             59 arch/ia64/lib/idiv64.S #ifdef MODULO
MODULO             68 arch/ia64/lib/idiv64.S #ifdef MODULO
MODULO             76 arch/ia64/lib/idiv64.S #ifdef MODULO
MODULO            916 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		REG_WRITE(MODULO[inst], dp_dto_ref_100hz);
MODULO             67 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h 		SRII(MODULO, DP_DTO, 0),\
MODULO             68 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h 		SRII(MODULO, DP_DTO, 1),\
MODULO             69 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h 		SRII(MODULO, DP_DTO, 2),\
MODULO             70 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h 		SRII(MODULO, DP_DTO, 3),\
MODULO             71 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h 		SRII(MODULO, DP_DTO, 4),\
MODULO             72 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h 		SRII(MODULO, DP_DTO, 5),\
MODULO             88 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h 		SRII(MODULO, DP_DTO, 0),\
MODULO             89 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h 		SRII(MODULO, DP_DTO, 1),\
MODULO             90 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h 		SRII(MODULO, DP_DTO, 2),\
MODULO             91 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h 		SRII(MODULO, DP_DTO, 3),\
MODULO            114 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h 		SRII(MODULO, DP_DTO, 0),\
MODULO            115 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h 		SRII(MODULO, DP_DTO, 1),\
MODULO            116 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h 		SRII(MODULO, DP_DTO, 2),\
MODULO            117 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h 		SRII(MODULO, DP_DTO, 3),\
MODULO            159 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h 	uint32_t MODULO[MAX_PIPES];
MODULO            144 drivers/net/ethernet/emulex/benet/be.h 	*index = MODULO((*index + val), limit);
MODULO            149 drivers/net/ethernet/emulex/benet/be.h 	*index = MODULO((*index + 1), limit);
MODULO            174 drivers/net/ethernet/emulex/benet/be.h 	*index = MODULO((*index - 1), limit);
MODULO           5627 drivers/net/ethernet/emulex/benet/be_main.c 	    MODULO(adapter->work_counter, adapter->be_get_temp_freq) == 0)
MODULO             48 drivers/scsi/be2iscsi/be.h 	*index = MODULO((*index + 1), limit);