MMU_PAGE_64K      158 arch/powerpc/include/asm/book3s/64/hash-64k.h 	(((pte) & H_PAGE_COMBO)? MMU_PAGE_4K: MMU_PAGE_64K)
MMU_PAGE_64K      175 arch/powerpc/include/asm/book3s/64/mmu.h 	if (psize == MMU_PAGE_64K)
MMU_PAGE_64K      141 arch/powerpc/include/asm/nohash/32/mmu-44x.h #define mmu_virtual_psize	MMU_PAGE_64K
MMU_PAGE_64K      110 arch/powerpc/kvm/book3s_64_mmu.c 	case MMU_PAGE_64K:
MMU_PAGE_64K      193 arch/powerpc/kvm/book3s_64_mmu.c 	case MMU_PAGE_64K:
MMU_PAGE_64K      195 arch/powerpc/kvm/book3s_64_mmu.c 			return MMU_PAGE_64K;
MMU_PAGE_64K      413 arch/powerpc/kvm/book3s_64_mmu.c 				slbe->base_page_size = MMU_PAGE_64K;
MMU_PAGE_64K      594 arch/powerpc/kvm/book3s_64_mmu.c 	int pagesize = MMU_PAGE_64K;
MMU_PAGE_64K      637 arch/powerpc/kvm/book3s_64_mmu.c 	if (pagesize >= MMU_PAGE_64K &&
MMU_PAGE_64K      638 arch/powerpc/kvm/book3s_64_mmu.c 	    mmu_psize_defs[MMU_PAGE_64K].shift &&
MMU_PAGE_64K      143 arch/powerpc/kvm/book3s_64_mmu_host.c 		hpsize = MMU_PAGE_64K;
MMU_PAGE_64K      343 arch/powerpc/kvm/book3s_64_mmu_host.c 		slb_vsid |= mmu_psize_defs[MMU_PAGE_64K].sllp;
MMU_PAGE_64K     1127 arch/powerpc/kvm/book3s_64_mmu_radix.c 	add_rmmu_ap_encoding(info, MMU_PAGE_64K, &i);
MMU_PAGE_64K      694 arch/powerpc/kvm/book3s_pr.c 		pte.page_size = MMU_PAGE_64K;
MMU_PAGE_64K      100 arch/powerpc/mm/book3s64/hash_64k.c 		flush_hash_page(vpn, rpte, MMU_PAGE_64K, ssize, flags);
MMU_PAGE_64K      232 arch/powerpc/mm/book3s64/hash_64k.c 	unsigned long shift = mmu_psize_defs[MMU_PAGE_64K].shift;
MMU_PAGE_64K      278 arch/powerpc/mm/book3s64/hash_64k.c 		if (mmu_hash_ops.hpte_updatepp(gslot, rflags, vpn, MMU_PAGE_64K,
MMU_PAGE_64K      279 arch/powerpc/mm/book3s64/hash_64k.c 					       MMU_PAGE_64K, ssize,
MMU_PAGE_64K      294 arch/powerpc/mm/book3s64/hash_64k.c 						MMU_PAGE_64K, MMU_PAGE_64K,
MMU_PAGE_64K      304 arch/powerpc/mm/book3s64/hash_64k.c 							MMU_PAGE_64K,
MMU_PAGE_64K      305 arch/powerpc/mm/book3s64/hash_64k.c 							MMU_PAGE_64K, ssize);
MMU_PAGE_64K      324 arch/powerpc/mm/book3s64/hash_64k.c 					   MMU_PAGE_64K, MMU_PAGE_64K, old_pte);
MMU_PAGE_64K       88 arch/powerpc/mm/book3s64/hash_hugepage.c 			flush_hash_hugepage(vsid, ea, pmdp, MMU_PAGE_64K,
MMU_PAGE_64K      327 arch/powerpc/mm/book3s64/hash_pgtable.c 		psize = MMU_PAGE_64K;
MMU_PAGE_64K      398 arch/powerpc/mm/book3s64/hash_pgtable.c 	if (mmu_psize_defs[MMU_PAGE_64K].shift &&
MMU_PAGE_64K      399 arch/powerpc/mm/book3s64/hash_pgtable.c 	    (mmu_psize_defs[MMU_PAGE_64K].penc[MMU_PAGE_16M] == -1))
MMU_PAGE_64K      395 arch/powerpc/mm/book3s64/hash_utils.c 		idx = MMU_PAGE_64K;
MMU_PAGE_64K      457 arch/powerpc/mm/book3s64/hash_utils.c 		if (base_idx == MMU_PAGE_4K || base_idx == MMU_PAGE_64K)
MMU_PAGE_64K      667 arch/powerpc/mm/book3s64/hash_utils.c 	if (mmu_psize_defs[MMU_PAGE_64K].shift) {
MMU_PAGE_64K      668 arch/powerpc/mm/book3s64/hash_utils.c 		mmu_virtual_psize = MMU_PAGE_64K;
MMU_PAGE_64K      669 arch/powerpc/mm/book3s64/hash_utils.c 		mmu_vmalloc_psize = MMU_PAGE_64K;
MMU_PAGE_64K      671 arch/powerpc/mm/book3s64/hash_utils.c 			mmu_linear_psize = MMU_PAGE_64K;
MMU_PAGE_64K      679 arch/powerpc/mm/book3s64/hash_utils.c 				mmu_io_psize = MMU_PAGE_64K;
MMU_PAGE_64K     1378 arch/powerpc/mm/book3s64/hash_utils.c 	if ((pte_val(*ptep) & H_PAGE_4K_PFN) && psize == MMU_PAGE_64K) {
MMU_PAGE_64K     1387 arch/powerpc/mm/book3s64/hash_utils.c 	if (mmu_ci_restrictions && psize == MMU_PAGE_64K && pte_ci(*ptep)) {
MMU_PAGE_64K     1411 arch/powerpc/mm/book3s64/hash_utils.c 	if (psize == MMU_PAGE_64K)
MMU_PAGE_64K     1582 arch/powerpc/mm/book3s64/hash_utils.c 	if (mm_ctx_user_psize(&mm->context) == MMU_PAGE_64K)
MMU_PAGE_64K      412 arch/powerpc/mm/book3s64/pgtable.c 		   atomic_long_read(&direct_pages_count[MMU_PAGE_64K]) << 6);
MMU_PAGE_64K      411 arch/powerpc/mm/book3s64/radix_pgtable.c 		idx = MMU_PAGE_64K;
MMU_PAGE_64K      487 arch/powerpc/mm/book3s64/radix_pgtable.c 	mmu_psize_defs[MMU_PAGE_64K].shift = 16;
MMU_PAGE_64K      488 arch/powerpc/mm/book3s64/radix_pgtable.c 	mmu_psize_defs[MMU_PAGE_64K].ap = 0x5;
MMU_PAGE_64K      547 arch/powerpc/mm/book3s64/radix_pgtable.c 	mmu_virtual_psize = MMU_PAGE_64K;
MMU_PAGE_64K      243 arch/powerpc/mm/book3s64/radix_tlb.c 		__tlbie_va(va, pid, mmu_get_ap(MMU_PAGE_64K), RIC_FLUSH_TLB);
MMU_PAGE_64K      277 arch/powerpc/mm/book3s64/radix_tlb.c 		__tlbie_lpid_va(va, lpid, mmu_get_ap(MMU_PAGE_64K), RIC_FLUSH_TLB);
MMU_PAGE_64K      113 arch/powerpc/mm/nohash/tlb.c 	[MMU_PAGE_64K] = {
MMU_PAGE_64K      424 arch/powerpc/mm/slice.c #define MMU_PAGE_BASE	MMU_PAGE_64K
MMU_PAGE_64K      518 arch/powerpc/mm/slice.c 	if (IS_ENABLED(CONFIG_PPC_64K_PAGES) && psize == MMU_PAGE_64K) {
MMU_PAGE_64K      597 arch/powerpc/mm/slice.c 	    psize == MMU_PAGE_64K) {
MMU_PAGE_64K      771 arch/powerpc/mm/slice.c 	if (IS_ENABLED(CONFIG_PPC_64K_PAGES) && psize == MMU_PAGE_64K) {
MMU_PAGE_64K      119 arch/powerpc/platforms/cell/spu_base.c 	return mmu_psize_defs[MMU_PAGE_64K].shift != 0;