MMU_PAGE_4K 109 arch/powerpc/include/asm/book3s/32/mmu-hash.h #define mmu_virtual_psize MMU_PAGE_4K MMU_PAGE_4K 148 arch/powerpc/include/asm/book3s/64/hash-64k.h unsigned __split = (psize == MMU_PAGE_4K || \ MMU_PAGE_4K 158 arch/powerpc/include/asm/book3s/64/hash-64k.h (((pte) & H_PAGE_COMBO)? MMU_PAGE_4K: MMU_PAGE_64K) MMU_PAGE_4K 394 arch/powerpc/include/asm/book3s/64/mmu-hash.h if (actual_psize != MMU_PAGE_4K) MMU_PAGE_4K 408 arch/powerpc/include/asm/book3s/64/mmu-hash.h if (actual_psize == MMU_PAGE_4K) MMU_PAGE_4K 184 arch/powerpc/include/asm/book3s/64/mmu.h BUG_ON(psize != MMU_PAGE_4K); MMU_PAGE_4K 349 arch/powerpc/include/asm/book3s/64/pgtable.h #define pte_pagesize_index(mm, addr, pte) MMU_PAGE_4K MMU_PAGE_4K 65 arch/powerpc/include/asm/nohash/32/mmu-40x.h #define mmu_virtual_psize MMU_PAGE_4K MMU_PAGE_4K 133 arch/powerpc/include/asm/nohash/32/mmu-44x.h #define mmu_virtual_psize MMU_PAGE_4K MMU_PAGE_4K 188 arch/powerpc/include/asm/nohash/32/mmu-8xx.h #define mmu_virtual_psize MMU_PAGE_4K MMU_PAGE_4K 273 arch/powerpc/include/asm/nohash/mmu-book3e.h #define mmu_virtual_psize MMU_PAGE_4K MMU_PAGE_4K 797 arch/powerpc/kernel/setup_64.c if (mmu_linear_psize == MMU_PAGE_4K) MMU_PAGE_4K 303 arch/powerpc/kvm/book3s_32_mmu.c pte->page_size = MMU_PAGE_4K; MMU_PAGE_4K 234 arch/powerpc/kvm/book3s_64_mmu.c gpte->page_size = MMU_PAGE_4K; MMU_PAGE_4K 256 arch/powerpc/kvm/book3s_64_mmu.c pgsize = slbe->large ? MMU_PAGE_16M : MMU_PAGE_4K; MMU_PAGE_4K 405 arch/powerpc/kvm/book3s_64_mmu.c slbe->base_page_size = MMU_PAGE_4K; MMU_PAGE_4K 83 arch/powerpc/kvm/book3s_64_mmu_host.c int hpsize = MMU_PAGE_4K; MMU_PAGE_4K 190 arch/powerpc/kvm/book3s_64_mmu_radix.c for (ps = MMU_PAGE_4K; ps < MMU_PAGE_COUNT; ++ps) MMU_PAGE_4K 1126 arch/powerpc/kvm/book3s_64_mmu_radix.c add_rmmu_ap_encoding(info, MMU_PAGE_4K, &i); MMU_PAGE_4K 28 arch/powerpc/mm/book3s64/hash_4k.c unsigned long shift = mmu_psize_defs[MMU_PAGE_4K].shift; MMU_PAGE_4K 72 arch/powerpc/mm/book3s64/hash_4k.c if (mmu_hash_ops.hpte_updatepp(gslot, rflags, vpn, MMU_PAGE_4K, MMU_PAGE_4K 73 arch/powerpc/mm/book3s64/hash_4k.c MMU_PAGE_4K, ssize, flags) == -1) MMU_PAGE_4K 87 arch/powerpc/mm/book3s64/hash_4k.c MMU_PAGE_4K, MMU_PAGE_4K, ssize); MMU_PAGE_4K 96 arch/powerpc/mm/book3s64/hash_4k.c MMU_PAGE_4K, MMU_PAGE_4K 97 arch/powerpc/mm/book3s64/hash_4k.c MMU_PAGE_4K, ssize); MMU_PAGE_4K 116 arch/powerpc/mm/book3s64/hash_4k.c MMU_PAGE_4K, MMU_PAGE_4K, old_pte); MMU_PAGE_4K 46 arch/powerpc/mm/book3s64/hash_64k.c unsigned long shift = mmu_psize_defs[MMU_PAGE_4K].shift; MMU_PAGE_4K 119 arch/powerpc/mm/book3s64/hash_64k.c MMU_PAGE_4K, MMU_PAGE_4K, MMU_PAGE_4K 161 arch/powerpc/mm/book3s64/hash_64k.c MMU_PAGE_4K, MMU_PAGE_4K, ssize); MMU_PAGE_4K 171 arch/powerpc/mm/book3s64/hash_64k.c MMU_PAGE_4K, MMU_PAGE_4K, MMU_PAGE_4K 184 arch/powerpc/mm/book3s64/hash_64k.c MMU_PAGE_4K, MMU_PAGE_4K, MMU_PAGE_4K 212 arch/powerpc/mm/book3s64/hash_64k.c MMU_PAGE_4K, MMU_PAGE_4K, old_pte); MMU_PAGE_4K 81 arch/powerpc/mm/book3s64/hash_hugepage.c if (psize == MMU_PAGE_4K) { MMU_PAGE_4K 181 arch/powerpc/mm/book3s64/hash_hugepage.c if (psize == MMU_PAGE_4K) MMU_PAGE_4K 167 arch/powerpc/mm/book3s64/hash_native.c case MMU_PAGE_4K: MMU_PAGE_4K 257 arch/powerpc/mm/book3s64/hash_native.c case MMU_PAGE_4K: MMU_PAGE_4K 703 arch/powerpc/mm/book3s64/hash_native.c size = MMU_PAGE_4K; MMU_PAGE_4K 704 arch/powerpc/mm/book3s64/hash_native.c a_size = MMU_PAGE_4K; MMU_PAGE_4K 325 arch/powerpc/mm/book3s64/hash_pgtable.c psize = MMU_PAGE_4K; MMU_PAGE_4K 404 arch/powerpc/mm/book3s64/hash_pgtable.c if (mmu_psize_defs[MMU_PAGE_4K].penc[MMU_PAGE_16M] == -1) MMU_PAGE_4K 108 arch/powerpc/mm/book3s64/hash_utils.c int mmu_linear_psize = MMU_PAGE_4K; MMU_PAGE_4K 110 arch/powerpc/mm/book3s64/hash_utils.c int mmu_virtual_psize = MMU_PAGE_4K; MMU_PAGE_4K 111 arch/powerpc/mm/book3s64/hash_utils.c int mmu_vmalloc_psize = MMU_PAGE_4K; MMU_PAGE_4K 113 arch/powerpc/mm/book3s64/hash_utils.c int mmu_vmemmap_psize = MMU_PAGE_4K; MMU_PAGE_4K 115 arch/powerpc/mm/book3s64/hash_utils.c int mmu_io_psize = MMU_PAGE_4K; MMU_PAGE_4K 141 arch/powerpc/mm/book3s64/hash_utils.c [MMU_PAGE_4K] = { MMU_PAGE_4K 144 arch/powerpc/mm/book3s64/hash_utils.c .penc = {[MMU_PAGE_4K] = 0, [1 ... MMU_PAGE_COUNT - 1] = -1}, MMU_PAGE_4K 156 arch/powerpc/mm/book3s64/hash_utils.c [MMU_PAGE_4K] = { MMU_PAGE_4K 159 arch/powerpc/mm/book3s64/hash_utils.c .penc = {[MMU_PAGE_4K] = 0, [1 ... MMU_PAGE_COUNT - 1] = -1}, MMU_PAGE_4K 392 arch/powerpc/mm/book3s64/hash_utils.c idx = MMU_PAGE_4K; MMU_PAGE_4K 457 arch/powerpc/mm/book3s64/hash_utils.c if (base_idx == MMU_PAGE_4K || base_idx == MMU_PAGE_64K) MMU_PAGE_4K 670 arch/powerpc/mm/book3s64/hash_utils.c if (mmu_linear_psize == MMU_PAGE_4K) MMU_PAGE_4K 1144 arch/powerpc/mm/book3s64/hash_utils.c if (get_slice_psize(mm, addr) == MMU_PAGE_4K) MMU_PAGE_4K 1146 arch/powerpc/mm/book3s64/hash_utils.c slice_set_range_psize(mm, addr, 1, MMU_PAGE_4K); MMU_PAGE_4K 1148 arch/powerpc/mm/book3s64/hash_utils.c if ((get_paca_psize(addr) != MMU_PAGE_4K) && (current->mm == mm)) { MMU_PAGE_4K 1320 arch/powerpc/mm/book3s64/hash_utils.c if (psize != MMU_PAGE_4K) MMU_PAGE_4K 1380 arch/powerpc/mm/book3s64/hash_utils.c psize = MMU_PAGE_4K; MMU_PAGE_4K 1390 arch/powerpc/mm/book3s64/hash_utils.c psize = MMU_PAGE_4K; MMU_PAGE_4K 1400 arch/powerpc/mm/book3s64/hash_utils.c psize = mmu_vmalloc_psize = MMU_PAGE_4K; MMU_PAGE_4K 1509 arch/powerpc/mm/book3s64/hash_utils.c if (unlikely((psize == MMU_PAGE_4K) && subpage_protection(mm, ea))) MMU_PAGE_4K 410 arch/powerpc/mm/book3s64/pgtable.c atomic_long_read(&direct_pages_count[MMU_PAGE_4K]) << 2); MMU_PAGE_4K 408 arch/powerpc/mm/book3s64/radix_pgtable.c idx = MMU_PAGE_4K; MMU_PAGE_4K 484 arch/powerpc/mm/book3s64/radix_pgtable.c mmu_psize_defs[MMU_PAGE_4K].shift = 12; MMU_PAGE_4K 485 arch/powerpc/mm/book3s64/radix_pgtable.c mmu_psize_defs[MMU_PAGE_4K].ap = 0x0; MMU_PAGE_4K 549 arch/powerpc/mm/book3s64/radix_pgtable.c mmu_virtual_psize = MMU_PAGE_4K; MMU_PAGE_4K 54 arch/powerpc/mm/nohash/tlb.c [MMU_PAGE_4K] = { MMU_PAGE_4K 87 arch/powerpc/mm/nohash/tlb.c [MMU_PAGE_4K] = { MMU_PAGE_4K 104 arch/powerpc/mm/nohash/tlb.c [MMU_PAGE_4K] = { MMU_PAGE_4K 676 arch/powerpc/mm/nohash/tlb.c mmu_vmemmap_psize = MMU_PAGE_4K; MMU_PAGE_4K 426 arch/powerpc/mm/slice.c #define MMU_PAGE_BASE MMU_PAGE_4K MMU_PAGE_4K 519 arch/powerpc/mm/slice.c compat_maskp = slice_mask_for_size(&mm->context, MMU_PAGE_4K); MMU_PAGE_4K 775 arch/powerpc/mm/slice.c compat_maskp = slice_mask_for_size(&mm->context, MMU_PAGE_4K); MMU_PAGE_4K 1390 arch/powerpc/platforms/pseries/lpar.c set_hblkrm_bloc_size(MMU_PAGE_4K, MMU_PAGE_4K, block_size);