MMIO_RING_F      1845 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_RING_F(prefix, 4, 0, 0, 0, d, NULL, NULL)
MMIO_RING_F      1848 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_RING_F(prefix, 4, f, 0, 0, d, r, w)
MMIO_RING_F      1851 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_RING_F(prefix, 4, F_GMADR, 0xFFFF0000, 0, d, r, w)
MMIO_RING_F      1854 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_RING_F(prefix, 4, F_GMADR | F_CMD_ACCESS, 0xFFFF0000, 0, d, r, w)
MMIO_RING_F      1857 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_RING_F(prefix, 4, F_RO | f, 0, rm, d, r, w)
MMIO_RING_F      2745 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_RING_F(RING_REG, 4, F_RO, 0,
MMIO_RING_F      2755 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_RING_F(RING_REG, 8, F_RO | F_CMD_ACCESS, 0, ~0, D_BDW_PLUS,
MMIO_RING_F      2764 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_RING_F(RING_REG, 48, F_RO, 0, ~0, D_BDW_PLUS, NULL, NULL);
MMIO_RING_F      2787 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_RING_F(RING_REG, 32, 0, 0, 0, D_BDW_PLUS, NULL, NULL);