MMHUB_INSTANCE_REGISTER_OFFSET   67 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 			    dist * vmid + hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
MMHUB_INSTANCE_REGISTER_OFFSET   72 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 			    dist * vmid + hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
MMHUB_INSTANCE_REGISTER_OFFSET   86 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 			    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
MMHUB_INSTANCE_REGISTER_OFFSET   90 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 			    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
MMHUB_INSTANCE_REGISTER_OFFSET   95 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 			    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
MMHUB_INSTANCE_REGISTER_OFFSET   99 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 			    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
MMHUB_INSTANCE_REGISTER_OFFSET  111 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 			    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
MMHUB_INSTANCE_REGISTER_OFFSET  114 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 			    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
MMHUB_INSTANCE_REGISTER_OFFSET  117 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 			    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
MMHUB_INSTANCE_REGISTER_OFFSET  123 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 			    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
MMHUB_INSTANCE_REGISTER_OFFSET  127 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 			    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
MMHUB_INSTANCE_REGISTER_OFFSET  135 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 			hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
MMHUB_INSTANCE_REGISTER_OFFSET  139 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 			hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
MMHUB_INSTANCE_REGISTER_OFFSET  145 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 			    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
MMHUB_INSTANCE_REGISTER_OFFSET  149 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 			    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
MMHUB_INSTANCE_REGISTER_OFFSET  154 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 				  hubid * MMHUB_INSTANCE_REGISTER_OFFSET);
MMHUB_INSTANCE_REGISTER_OFFSET  158 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 			    hubid * MMHUB_INSTANCE_REGISTER_OFFSET, tmp);
MMHUB_INSTANCE_REGISTER_OFFSET  168 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 			   hubid * MMHUB_INSTANCE_REGISTER_OFFSET);
MMHUB_INSTANCE_REGISTER_OFFSET  186 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 			    hubid * MMHUB_INSTANCE_REGISTER_OFFSET, tmp);
MMHUB_INSTANCE_REGISTER_OFFSET  195 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 				  hubid * MMHUB_INSTANCE_REGISTER_OFFSET);
MMHUB_INSTANCE_REGISTER_OFFSET  210 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 		     hubid * MMHUB_INSTANCE_REGISTER_OFFSET, tmp);
MMHUB_INSTANCE_REGISTER_OFFSET  213 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 				  hubid * MMHUB_INSTANCE_REGISTER_OFFSET);
MMHUB_INSTANCE_REGISTER_OFFSET  219 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 			    hubid * MMHUB_INSTANCE_REGISTER_OFFSET, tmp);
MMHUB_INSTANCE_REGISTER_OFFSET  232 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 			    hubid * MMHUB_INSTANCE_REGISTER_OFFSET, tmp);
MMHUB_INSTANCE_REGISTER_OFFSET  240 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 			    hubid * MMHUB_INSTANCE_REGISTER_OFFSET, tmp);
MMHUB_INSTANCE_REGISTER_OFFSET  249 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 				  hubid * MMHUB_INSTANCE_REGISTER_OFFSET);
MMHUB_INSTANCE_REGISTER_OFFSET  253 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 			    hubid * MMHUB_INSTANCE_REGISTER_OFFSET, tmp);
MMHUB_INSTANCE_REGISTER_OFFSET  261 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 		    hubid * MMHUB_INSTANCE_REGISTER_OFFSET, 0XFFFFFFFF);
MMHUB_INSTANCE_REGISTER_OFFSET  264 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 		    hubid * MMHUB_INSTANCE_REGISTER_OFFSET, 0x0000000F);
MMHUB_INSTANCE_REGISTER_OFFSET  268 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 		    hubid * MMHUB_INSTANCE_REGISTER_OFFSET, 0);
MMHUB_INSTANCE_REGISTER_OFFSET  271 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 		    hubid * MMHUB_INSTANCE_REGISTER_OFFSET, 0);
MMHUB_INSTANCE_REGISTER_OFFSET  275 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 		    hubid * MMHUB_INSTANCE_REGISTER_OFFSET, 0);
MMHUB_INSTANCE_REGISTER_OFFSET  278 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 		    hubid * MMHUB_INSTANCE_REGISTER_OFFSET, 0);
MMHUB_INSTANCE_REGISTER_OFFSET  288 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 				hubid * MMHUB_INSTANCE_REGISTER_OFFSET + i);
MMHUB_INSTANCE_REGISTER_OFFSET  316 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 				    hubid * MMHUB_INSTANCE_REGISTER_OFFSET + i,
MMHUB_INSTANCE_REGISTER_OFFSET  320 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 			    hubid * MMHUB_INSTANCE_REGISTER_OFFSET + i*2, 0);
MMHUB_INSTANCE_REGISTER_OFFSET  323 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 			    hubid * MMHUB_INSTANCE_REGISTER_OFFSET + i*2, 0);
MMHUB_INSTANCE_REGISTER_OFFSET  326 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 				hubid * MMHUB_INSTANCE_REGISTER_OFFSET + i*2,
MMHUB_INSTANCE_REGISTER_OFFSET  330 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 				hubid * MMHUB_INSTANCE_REGISTER_OFFSET + i*2,
MMHUB_INSTANCE_REGISTER_OFFSET  343 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 				hubid * MMHUB_INSTANCE_REGISTER_OFFSET + 2 * i,
MMHUB_INSTANCE_REGISTER_OFFSET  347 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 				hubid * MMHUB_INSTANCE_REGISTER_OFFSET + 2 * i,
MMHUB_INSTANCE_REGISTER_OFFSET  365 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 				     i * MMHUB_INSTANCE_REGISTER_OFFSET,
MMHUB_INSTANCE_REGISTER_OFFSET  369 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 				     i * MMHUB_INSTANCE_REGISTER_OFFSET,
MMHUB_INSTANCE_REGISTER_OFFSET  398 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 					    j * MMHUB_INSTANCE_REGISTER_OFFSET +
MMHUB_INSTANCE_REGISTER_OFFSET  404 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 				   j * MMHUB_INSTANCE_REGISTER_OFFSET);
MMHUB_INSTANCE_REGISTER_OFFSET  412 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 				    j * MMHUB_INSTANCE_REGISTER_OFFSET, tmp);
MMHUB_INSTANCE_REGISTER_OFFSET  416 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 					  j * MMHUB_INSTANCE_REGISTER_OFFSET);
MMHUB_INSTANCE_REGISTER_OFFSET  420 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 				    j * MMHUB_INSTANCE_REGISTER_OFFSET, tmp);
MMHUB_INSTANCE_REGISTER_OFFSET  422 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 				    j * MMHUB_INSTANCE_REGISTER_OFFSET, 0);
MMHUB_INSTANCE_REGISTER_OFFSET  440 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 					  i * MMHUB_INSTANCE_REGISTER_OFFSET);
MMHUB_INSTANCE_REGISTER_OFFSET  486 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 				    i * MMHUB_INSTANCE_REGISTER_OFFSET, tmp);
MMHUB_INSTANCE_REGISTER_OFFSET  500 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 			    i * MMHUB_INSTANCE_REGISTER_OFFSET;
MMHUB_INSTANCE_REGISTER_OFFSET  504 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 			    i * MMHUB_INSTANCE_REGISTER_OFFSET;
MMHUB_INSTANCE_REGISTER_OFFSET  508 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 					 i * MMHUB_INSTANCE_REGISTER_OFFSET;
MMHUB_INSTANCE_REGISTER_OFFSET  512 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 					 i * MMHUB_INSTANCE_REGISTER_OFFSET;
MMHUB_INSTANCE_REGISTER_OFFSET  516 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 					 i * MMHUB_INSTANCE_REGISTER_OFFSET;
MMHUB_INSTANCE_REGISTER_OFFSET  520 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 					 i * MMHUB_INSTANCE_REGISTER_OFFSET;
MMHUB_INSTANCE_REGISTER_OFFSET  524 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 				    i * MMHUB_INSTANCE_REGISTER_OFFSET;
MMHUB_INSTANCE_REGISTER_OFFSET  528 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 				    i * MMHUB_INSTANCE_REGISTER_OFFSET;
MMHUB_INSTANCE_REGISTER_OFFSET  542 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 					i * MMHUB_INSTANCE_REGISTER_OFFSET);
MMHUB_INSTANCE_REGISTER_OFFSET  551 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 				i * MMHUB_INSTANCE_REGISTER_OFFSET, data);
MMHUB_INSTANCE_REGISTER_OFFSET  556 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 					i * MMHUB_INSTANCE_REGISTER_OFFSET +
MMHUB_INSTANCE_REGISTER_OFFSET  580 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 					i * MMHUB_INSTANCE_REGISTER_OFFSET +
MMHUB_INSTANCE_REGISTER_OFFSET  598 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 					i * MMHUB_INSTANCE_REGISTER_OFFSET);
MMHUB_INSTANCE_REGISTER_OFFSET  607 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 				i * MMHUB_INSTANCE_REGISTER_OFFSET, data);