MLXSW_ITEM_BIT_ARRAY 100 drivers/net/ethernet/mellanox/mlxsw/reg.h MLXSW_ITEM_BIT_ARRAY(reg, smid, port, 0x20, 0x20, 1); MLXSW_ITEM_BIT_ARRAY 106 drivers/net/ethernet/mellanox/mlxsw/reg.h MLXSW_ITEM_BIT_ARRAY(reg, smid, port_mask, 0x220, 0x20, 1); MLXSW_ITEM_BIT_ARRAY 801 drivers/net/ethernet/mellanox/mlxsw/reg.h MLXSW_ITEM_BIT_ARRAY(reg, spms, state, 0x04, 0x400, 2); MLXSW_ITEM_BIT_ARRAY 1145 drivers/net/ethernet/mellanox/mlxsw/reg.h MLXSW_ITEM_BIT_ARRAY(reg, sftr, port, 0x20, 0x20, 1); MLXSW_ITEM_BIT_ARRAY 1151 drivers/net/ethernet/mellanox/mlxsw/reg.h MLXSW_ITEM_BIT_ARRAY(reg, sftr, port_mask, 0x220, 0x20, 1); MLXSW_ITEM_BIT_ARRAY 2725 drivers/net/ethernet/mellanox/mlxsw/reg.h MLXSW_ITEM_BIT_ARRAY(reg, perpt, erp_vector, 0x14, 4, 1); MLXSW_ITEM_BIT_ARRAY 2902 drivers/net/ethernet/mellanox/mlxsw/reg.h MLXSW_ITEM_BIT_ARRAY(reg, ptce3, prune_vector, 0x90, 4, 1); MLXSW_ITEM_BIT_ARRAY 3073 drivers/net/ethernet/mellanox/mlxsw/reg.h MLXSW_ITEM_BIT_ARRAY(reg, pererp, erpt_vector, 0x14, 4, 1); MLXSW_ITEM_BIT_ARRAY 5150 drivers/net/ethernet/mellanox/mlxsw/reg.h MLXSW_ITEM_BIT_ARRAY(reg, pptb, prio_to_buff, 0x04, 0x04, 4); MLXSW_ITEM_BIT_ARRAY 5173 drivers/net/ethernet/mellanox/mlxsw/reg.h MLXSW_ITEM_BIT_ARRAY(reg, pptb, prio_to_buff_msb, 0x0C, 0x04, 4); MLXSW_ITEM_BIT_ARRAY 7705 drivers/net/ethernet/mellanox/mlxsw/reg.h MLXSW_ITEM_BIT_ARRAY(reg, recr2, outer_header_enables, 0x10, 0x04, 1); MLXSW_ITEM_BIT_ARRAY 7738 drivers/net/ethernet/mellanox/mlxsw/reg.h MLXSW_ITEM_BIT_ARRAY(reg, recr2, outer_header_fields_enable, 0x14, 0x14, 1); MLXSW_ITEM_BIT_ARRAY 10369 drivers/net/ethernet/mellanox/mlxsw/reg.h MLXSW_ITEM_BIT_ARRAY(reg, sbsr, ingress_port_mask, 0x10, 0x20, 1); MLXSW_ITEM_BIT_ARRAY 10379 drivers/net/ethernet/mellanox/mlxsw/reg.h MLXSW_ITEM_BIT_ARRAY(reg, sbsr, pg_buff_mask, 0x30, 0x4, 1); MLXSW_ITEM_BIT_ARRAY 10388 drivers/net/ethernet/mellanox/mlxsw/reg.h MLXSW_ITEM_BIT_ARRAY(reg, sbsr, egress_port_mask, 0x34, 0x20, 1); MLXSW_ITEM_BIT_ARRAY 10398 drivers/net/ethernet/mellanox/mlxsw/reg.h MLXSW_ITEM_BIT_ARRAY(reg, sbsr, tclass_mask, 0x54, 0x8, 1);