MLX5_MPWRQ_PAGES_PER_WQE   95 drivers/net/ethernet/mellanox/mlx5/core/en.h #define MLX5E_REQUIRED_WQE_MTTS		(ALIGN(MLX5_MPWRQ_PAGES_PER_WQE, 8))
MLX5_MPWRQ_PAGES_PER_WQE  146 drivers/net/ethernet/mellanox/mlx5/core/en.h 	 ALIGN(MLX5_MPWRQ_PAGES_PER_WQE * sizeof(struct mlx5_mtt), \
MLX5_MPWRQ_PAGES_PER_WQE  578 drivers/net/ethernet/mellanox/mlx5/core/en.h 	struct mlx5e_dma_info  dma_info[MLX5_MPWRQ_PAGES_PER_WQE];
MLX5_MPWRQ_PAGES_PER_WQE  584 drivers/net/ethernet/mellanox/mlx5/core/en.h 	DECLARE_BITMAP(xdp_xmit_bitmap, MLX5_MPWRQ_PAGES_PER_WQE);
MLX5_MPWRQ_PAGES_PER_WQE  592 drivers/net/ethernet/mellanox/mlx5/core/en.h #define MLX5E_CACHE_UNIT	(MLX5_MPWRQ_PAGES_PER_WQE > NAPI_POLL_WEIGHT ? \
MLX5_MPWRQ_PAGES_PER_WQE  593 drivers/net/ethernet/mellanox/mlx5/core/en.h 				 MLX5_MPWRQ_PAGES_PER_WQE : NAPI_POLL_WEIGHT)
MLX5_MPWRQ_PAGES_PER_WQE  247 drivers/net/ethernet/mellanox/mlx5/core/en_main.c 		cpu_to_be16(MLX5_MTT_OCTW(MLX5_MPWRQ_PAGES_PER_WQE));
MLX5_MPWRQ_PAGES_PER_WQE  445 drivers/net/ethernet/mellanox/mlx5/core/en_main.c 		pool_size = MLX5_MPWRQ_PAGES_PER_WQE <<
MLX5_MPWRQ_PAGES_PER_WQE  442 drivers/net/ethernet/mellanox/mlx5/core/en_rx.c 	if (bitmap_full(wi->xdp_xmit_bitmap, MLX5_MPWRQ_PAGES_PER_WQE))
MLX5_MPWRQ_PAGES_PER_WQE  446 drivers/net/ethernet/mellanox/mlx5/core/en_rx.c 				   MLX5_MPWRQ_PAGES_PER_WQE);
MLX5_MPWRQ_PAGES_PER_WQE  448 drivers/net/ethernet/mellanox/mlx5/core/en_rx.c 	for (i = 0; i < MLX5_MPWRQ_PAGES_PER_WQE; i++)
MLX5_MPWRQ_PAGES_PER_WQE  498 drivers/net/ethernet/mellanox/mlx5/core/en_rx.c 	    unlikely(!mlx5e_xsk_pages_enough_umem(rq, MLX5_MPWRQ_PAGES_PER_WQE))) {
MLX5_MPWRQ_PAGES_PER_WQE  513 drivers/net/ethernet/mellanox/mlx5/core/en_rx.c 	for (i = 0; i < MLX5_MPWRQ_PAGES_PER_WQE; i++, dma_info++) {
MLX5_MPWRQ_PAGES_PER_WQE  520 drivers/net/ethernet/mellanox/mlx5/core/en_rx.c 	bitmap_zero(wi->xdp_xmit_bitmap, MLX5_MPWRQ_PAGES_PER_WQE);