MLX5_FPGA_ACCESS_REG_SZ 47 drivers/net/ethernet/mellanox/mlx5/core/fpga/cmd.c u32 in[MLX5_FPGA_ACCESS_REG_SZ] = {0}; MLX5_FPGA_ACCESS_REG_SZ 48 drivers/net/ethernet/mellanox/mlx5/core/fpga/cmd.c u32 out[MLX5_FPGA_ACCESS_REG_SZ];