MLX5_CAP_ROCE     532 drivers/infiniband/hw/mlx5/main.c 	props->gid_tbl_len      = MLX5_CAP_ROCE(dev->mdev,
MLX5_CAP_ROCE     638 drivers/infiniband/hw/mlx5/main.c 	return cpu_to_be16(MLX5_CAP_ROCE(dev->mdev, r_roce_min_src_udp_port));
MLX5_CAP_ROCE    5091 drivers/infiniband/hw/mlx5/main.c 	u8 l3_type_cap = MLX5_CAP_ROCE(dev->mdev, l3_type);
MLX5_CAP_ROCE    5092 drivers/infiniband/hw/mlx5/main.c 	u8 roce_version_cap = MLX5_CAP_ROCE(dev->mdev, roce_version);
MLX5_CAP_ROCE     740 drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c 		 MLX5_CAP_ROCE(mdev, r_roce_min_src_udp_port));
MLX5_CAP_ROCE     181 drivers/net/ethernet/mellanox/mlx5/core/fw.c 		err = mlx5_core_get_caps(dev, MLX5_CAP_ROCE);
MLX5_CAP_ROCE      41 drivers/net/ethernet/mellanox/mlx5/core/lib/gid.c 	unsigned int tblsz = MLX5_CAP_ROCE(dev, roce_address_table_size);
MLX5_CAP_ROCE     124 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_cmd.c 	caps->roce_min_src_udp = MLX5_CAP_ROCE(mdev, r_roce_min_src_udp_port);
MLX5_CAP_ROCE    1160 include/linux/mlx5/device.h 	MLX5_GET(roce_cap, mdev->caps.hca_cur[MLX5_CAP_ROCE], cap)
MLX5_CAP_ROCE    1163 include/linux/mlx5/device.h 	MLX5_GET(roce_cap, mdev->caps.hca_max[MLX5_CAP_ROCE], cap)