MLX5_CAP_GEN 406 drivers/infiniband/hw/mlx5/cong.c if (!MLX5_CAP_GEN(mdev, cc_query_allowed) || MLX5_CAP_GEN 407 drivers/infiniband/hw/mlx5/cong.c !MLX5_CAP_GEN(mdev, cc_modify_allowed)) MLX5_CAP_GEN 696 drivers/infiniband/hw/mlx5/cq.c if (MLX5_CAP_GEN(dev->mdev, mini_cqe_resp_stride_index)) MLX5_CAP_GEN 772 drivers/infiniband/hw/mlx5/cq.c MLX5_CAP_GEN(dev->mdev, cqe_compression_128)) || MLX5_CAP_GEN 774 drivers/infiniband/hw/mlx5/cq.c MLX5_CAP_GEN(dev->mdev, cqe_compression)))) { MLX5_CAP_GEN 797 drivers/infiniband/hw/mlx5/cq.c !MLX5_CAP_GEN(dev->mdev, cqe_128_always)) { MLX5_CAP_GEN 929 drivers/infiniband/hw/mlx5/cq.c (entries > (1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz)))) MLX5_CAP_GEN 936 drivers/infiniband/hw/mlx5/cq.c if (entries > (1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz))) MLX5_CAP_GEN 1101 drivers/infiniband/hw/mlx5/cq.c if (!MLX5_CAP_GEN(dev->mdev, cq_moderation)) MLX5_CAP_GEN 1243 drivers/infiniband/hw/mlx5/cq.c if (!MLX5_CAP_GEN(dev->mdev, cq_resize)) { MLX5_CAP_GEN 1249 drivers/infiniband/hw/mlx5/cq.c entries > (1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz))) { MLX5_CAP_GEN 1252 drivers/infiniband/hw/mlx5/cq.c 1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz)); MLX5_CAP_GEN 1257 drivers/infiniband/hw/mlx5/cq.c if (entries > (1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz)) + 1) MLX5_CAP_GEN 139 drivers/infiniband/hw/mlx5/devx.c if (!MLX5_CAP_GEN(dev->mdev, log_max_uctx)) MLX5_CAP_GEN 144 drivers/infiniband/hw/mlx5/devx.c (MLX5_CAP_GEN(dev->mdev, uctx_cap) & MLX5_UCTX_CAP_RAW_TX)) MLX5_CAP_GEN 147 drivers/infiniband/hw/mlx5/devx.c (MLX5_CAP_GEN(dev->mdev, uctx_cap) & MLX5_CAP_GEN 1877 drivers/infiniband/hw/mlx5/devx.c if (MLX5_CAP_GEN(dev, event_cap)) { MLX5_CAP_GEN 2251 drivers/infiniband/hw/mlx5/devx.c if (!MLX5_CAP_GEN(dev, event_cap)) MLX5_CAP_GEN 2930 drivers/infiniband/hw/mlx5/devx.c return MLX5_CAP_GEN(dev->mdev, log_max_uctx); MLX5_CAP_GEN 69 drivers/infiniband/hw/mlx5/gsi.c return MLX5_CAP_GEN(dev->mdev, set_deth_sqpn); MLX5_CAP_GEN 289 drivers/infiniband/hw/mlx5/mad.c if (MLX5_CAP_GEN(dev->mdev, vport_counters) && MLX5_CAP_GEN 569 drivers/infiniband/hw/mlx5/mad.c props->max_msg_sz = 1 << MLX5_CAP_GEN(mdev, log_max_msg); MLX5_CAP_GEN 141 drivers/infiniband/hw/mlx5/main.c int port_type_cap = MLX5_CAP_GEN(dev->mdev, port_type); MLX5_CAP_GEN 535 drivers/infiniband/hw/mlx5/main.c props->max_msg_sz = 1 << MLX5_CAP_GEN(dev->mdev, log_max_msg); MLX5_CAP_GEN 643 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(dev->mdev, port_type) == MLX5_CAP_PORT_TYPE_IB) MLX5_CAP_GEN 644 drivers/infiniband/hw/mlx5/main.c return !MLX5_CAP_GEN(dev->mdev, ib_virt); MLX5_CAP_GEN 755 drivers/infiniband/hw/mlx5/main.c *max_pkeys = mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(mdev, MLX5_CAP_GEN 839 drivers/infiniband/hw/mlx5/main.c u64 min_page_size = 1ull << MLX5_CAP_GEN(mdev, log_pg_sz); MLX5_CAP_GEN 876 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(mdev, pkv)) MLX5_CAP_GEN 878 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(mdev, qkv)) MLX5_CAP_GEN 880 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(mdev, apm)) MLX5_CAP_GEN 882 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(mdev, xrc)) MLX5_CAP_GEN 884 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(mdev, imaicl)) { MLX5_CAP_GEN 887 drivers/infiniband/hw/mlx5/main.c props->max_mw = 1 << MLX5_CAP_GEN(mdev, log_max_mkey); MLX5_CAP_GEN 892 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(mdev, sho)) { MLX5_CAP_GEN 901 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(mdev, block_lb_mc)) MLX5_CAP_GEN 904 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && raw_support) { MLX5_CAP_GEN 951 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(mdev, ipoib_basic_offloads)) { MLX5_CAP_GEN 956 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(dev->mdev, rq_delay_drop) && MLX5_CAP_GEN 957 drivers/infiniband/hw/mlx5/main.c MLX5_CAP_GEN(dev->mdev, general_notification_event) && MLX5_CAP_GEN 961 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(mdev, ipoib_enhanced_offloads) && MLX5_CAP_GEN 965 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && MLX5_CAP_GEN 981 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(mdev, end_pad)) MLX5_CAP_GEN 989 drivers/infiniband/hw/mlx5/main.c props->max_qp = 1 << MLX5_CAP_GEN(mdev, log_max_qp); MLX5_CAP_GEN 990 drivers/infiniband/hw/mlx5/main.c props->max_qp_wr = 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz); MLX5_CAP_GEN 991 drivers/infiniband/hw/mlx5/main.c max_rq_sg = MLX5_CAP_GEN(mdev, max_wqe_sz_rq) / MLX5_CAP_GEN 993 drivers/infiniband/hw/mlx5/main.c max_sq_desc = min_t(int, MLX5_CAP_GEN(mdev, max_wqe_sz_sq), 512); MLX5_CAP_GEN 1000 drivers/infiniband/hw/mlx5/main.c props->max_cq = 1 << MLX5_CAP_GEN(mdev, log_max_cq); MLX5_CAP_GEN 1001 drivers/infiniband/hw/mlx5/main.c props->max_cqe = (1 << MLX5_CAP_GEN(mdev, log_max_cq_sz)) - 1; MLX5_CAP_GEN 1002 drivers/infiniband/hw/mlx5/main.c props->max_mr = 1 << MLX5_CAP_GEN(mdev, log_max_mkey); MLX5_CAP_GEN 1003 drivers/infiniband/hw/mlx5/main.c props->max_pd = 1 << MLX5_CAP_GEN(mdev, log_max_pd); MLX5_CAP_GEN 1004 drivers/infiniband/hw/mlx5/main.c props->max_qp_rd_atom = 1 << MLX5_CAP_GEN(mdev, log_max_ra_req_qp); MLX5_CAP_GEN 1005 drivers/infiniband/hw/mlx5/main.c props->max_qp_init_rd_atom = 1 << MLX5_CAP_GEN(mdev, log_max_ra_res_qp); MLX5_CAP_GEN 1006 drivers/infiniband/hw/mlx5/main.c props->max_srq = 1 << MLX5_CAP_GEN(mdev, log_max_srq); MLX5_CAP_GEN 1007 drivers/infiniband/hw/mlx5/main.c props->max_srq_wr = (1 << MLX5_CAP_GEN(mdev, log_max_srq_sz)) - 1; MLX5_CAP_GEN 1008 drivers/infiniband/hw/mlx5/main.c props->local_ca_ack_delay = MLX5_CAP_GEN(mdev, local_ca_ack_delay); MLX5_CAP_GEN 1012 drivers/infiniband/hw/mlx5/main.c 1 << MLX5_CAP_GEN(mdev, log_max_klm_list_size); MLX5_CAP_GEN 1017 drivers/infiniband/hw/mlx5/main.c props->max_mcast_grp = 1 << MLX5_CAP_GEN(mdev, log_max_mcg); MLX5_CAP_GEN 1018 drivers/infiniband/hw/mlx5/main.c props->max_mcast_qp_attach = MLX5_CAP_GEN(mdev, max_qp_mcg); MLX5_CAP_GEN 1023 drivers/infiniband/hw/mlx5/main.c props->hca_core_clock = MLX5_CAP_GEN(mdev, device_frequency_khz); MLX5_CAP_GEN 1032 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(mdev, cd)) MLX5_CAP_GEN 1041 drivers/infiniband/hw/mlx5/main.c 1 << MLX5_CAP_GEN(dev->mdev, log_max_rqt); MLX5_CAP_GEN 1043 drivers/infiniband/hw/mlx5/main.c 1 << MLX5_CAP_GEN(dev->mdev, log_max_rqt_size); MLX5_CAP_GEN 1046 drivers/infiniband/hw/mlx5/main.c 1 << MLX5_CAP_GEN(dev->mdev, log_max_rq); MLX5_CAP_GEN 1049 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(mdev, tag_matching)) { MLX5_CAP_GEN 1051 drivers/infiniband/hw/mlx5/main.c (1 << MLX5_CAP_GEN(mdev, log_tag_matching_list_sz)) - 1; MLX5_CAP_GEN 1053 drivers/infiniband/hw/mlx5/main.c 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz); MLX5_CAP_GEN 1057 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(mdev, tag_matching) && MLX5_CAP_GEN 1058 drivers/infiniband/hw/mlx5/main.c MLX5_CAP_GEN(mdev, rndv_offload_rc)) { MLX5_CAP_GEN 1063 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(dev->mdev, cq_moderation)) { MLX5_CAP_GEN 1073 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(dev->mdev, cqe_compression)) { MLX5_CAP_GEN 1075 drivers/infiniband/hw/mlx5/main.c MLX5_CAP_GEN(dev->mdev, MLX5_CAP_GEN 1082 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(dev->mdev, mini_cqe_resp_stride_index)) MLX5_CAP_GEN 1091 drivers/infiniband/hw/mlx5/main.c MLX5_CAP_GEN(mdev, qos)) { MLX5_CAP_GEN 1123 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(mdev, cqe_compression_128)) MLX5_CAP_GEN 1127 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(mdev, cqe_128_always)) MLX5_CAP_GEN 1129 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(mdev, qp_packet_based)) MLX5_CAP_GEN 1159 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(mdev, striding_rq)) { MLX5_CAP_GEN 1326 drivers/infiniband/hw/mlx5/main.c props->gid_tbl_len = mlx5_get_gid_table_len(MLX5_CAP_GEN(mdev, gid_table_size)); MLX5_CAP_GEN 1327 drivers/infiniband/hw/mlx5/main.c props->max_msg_sz = 1 << MLX5_CAP_GEN(mdev, log_max_msg); MLX5_CAP_GEN 1328 drivers/infiniband/hw/mlx5/main.c props->pkey_tbl_len = mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(mdev, pkey_table_size)); MLX5_CAP_GEN 1571 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(dev->mdev, ib_virt) && is_ib) { MLX5_CAP_GEN 1638 drivers/infiniband/hw/mlx5/main.c MLX5_CAP_GEN(dev->mdev, uar_4k) ? "yes" : "no", MLX5_CAP_GEN 1734 drivers/infiniband/hw/mlx5/main.c if (!MLX5_CAP_GEN(dev->mdev, log_max_transport_domain)) MLX5_CAP_GEN 1741 drivers/infiniband/hw/mlx5/main.c if ((MLX5_CAP_GEN(dev->mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH) || MLX5_CAP_GEN 1742 drivers/infiniband/hw/mlx5/main.c (!MLX5_CAP_GEN(dev->mdev, disable_local_lb_uc) && MLX5_CAP_GEN 1743 drivers/infiniband/hw/mlx5/main.c !MLX5_CAP_GEN(dev->mdev, disable_local_lb_mc))) MLX5_CAP_GEN 1752 drivers/infiniband/hw/mlx5/main.c if (!MLX5_CAP_GEN(dev->mdev, log_max_transport_domain)) MLX5_CAP_GEN 1757 drivers/infiniband/hw/mlx5/main.c if ((MLX5_CAP_GEN(dev->mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH) || MLX5_CAP_GEN 1758 drivers/infiniband/hw/mlx5/main.c (!MLX5_CAP_GEN(dev->mdev, disable_local_lb_uc) && MLX5_CAP_GEN 1759 drivers/infiniband/hw/mlx5/main.c !MLX5_CAP_GEN(dev->mdev, disable_local_lb_mc))) MLX5_CAP_GEN 1807 drivers/infiniband/hw/mlx5/main.c resp.qp_tab_size = 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp); MLX5_CAP_GEN 1808 drivers/infiniband/hw/mlx5/main.c if (mlx5_core_is_pf(dev->mdev) && MLX5_CAP_GEN(dev->mdev, bf)) MLX5_CAP_GEN 1809 drivers/infiniband/hw/mlx5/main.c resp.bf_reg_size = 1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size); MLX5_CAP_GEN 1811 drivers/infiniband/hw/mlx5/main.c resp.max_sq_desc_sz = MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq); MLX5_CAP_GEN 1812 drivers/infiniband/hw/mlx5/main.c resp.max_rq_desc_sz = MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq); MLX5_CAP_GEN 1813 drivers/infiniband/hw/mlx5/main.c resp.max_send_wqebb = 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz); MLX5_CAP_GEN 1814 drivers/infiniband/hw/mlx5/main.c resp.max_recv_wr = 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz); MLX5_CAP_GEN 1815 drivers/infiniband/hw/mlx5/main.c resp.max_srq_recv_wr = 1 << MLX5_CAP_GEN(dev->mdev, log_max_srq_sz); MLX5_CAP_GEN 1817 drivers/infiniband/hw/mlx5/main.c (__u8)MLX5_CAP_GEN(dev->mdev, cqe_version), MLX5_CAP_GEN 1819 drivers/infiniband/hw/mlx5/main.c resp.log_uar_size = MLX5_CAP_GEN(dev->mdev, uar_4k) ? MLX5_CAP_GEN 1821 drivers/infiniband/hw/mlx5/main.c resp.num_uars_per_page = MLX5_CAP_GEN(dev->mdev, uar_4k) ? MLX5_CAP_GEN 1822 drivers/infiniband/hw/mlx5/main.c MLX5_CAP_GEN(dev->mdev, num_of_uars_per_page) : 1; MLX5_CAP_GEN 1879 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(dev->mdev, dump_fill_mkey)) { MLX5_CAP_GEN 1942 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(dev->mdev, dump_fill_mkey)) { MLX5_CAP_GEN 2011 drivers/infiniband/hw/mlx5/main.c fw_uars_per_page = MLX5_CAP_GEN(dev->mdev, uar_4k) ? MLX5_UARS_IN_PAGE : 1; MLX5_CAP_GEN 4704 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(dev->mdev, port_type) == MLX5_CAP_GEN 4706 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(dev->mdev, ib_virt)) { MLX5_CAP_GEN 5143 drivers/infiniband/hw/mlx5/main.c if ((ll == IB_LINK_LAYER_INFINIBAND) || MLX5_CAP_GEN(dev->mdev, roce)) MLX5_CAP_GEN 5247 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(dev->mdev, roce)) { MLX5_CAP_GEN 5260 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(dev->mdev, roce)) MLX5_CAP_GEN 5269 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(dev->mdev, roce)) MLX5_CAP_GEN 5361 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(dev->mdev, out_of_seq_cnt)) MLX5_CAP_GEN 5364 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(dev->mdev, retransmission_q_counters)) MLX5_CAP_GEN 5367 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(dev->mdev, enhanced_error_q_counters)) MLX5_CAP_GEN 5372 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(dev->mdev, cc_query_allowed)) { MLX5_CAP_GEN 5409 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(dev->mdev, out_of_seq_cnt)) { MLX5_CAP_GEN 5416 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(dev->mdev, retransmission_q_counters)) { MLX5_CAP_GEN 5423 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(dev->mdev, enhanced_error_q_counters)) { MLX5_CAP_GEN 5430 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(dev->mdev, cc_query_allowed)) { MLX5_CAP_GEN 5452 drivers/infiniband/hw/mlx5/main.c is_shared = MLX5_CAP_GEN(dev->mdev, log_max_uctx) != 0; MLX5_CAP_GEN 5606 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(dev->mdev, cc_query_allowed)) { MLX5_CAP_GEN 6376 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(mdev, ipoib_enhanced_offloads) && MLX5_CAP_GEN 6384 drivers/infiniband/hw/mlx5/main.c dev->umr_fence = mlx5_get_umr_fence(MLX5_CAP_GEN(mdev, umr_fence)); MLX5_CAP_GEN 6386 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(mdev, imaicl)) { MLX5_CAP_GEN 6393 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(mdev, xrc)) { MLX5_CAP_GEN 6417 drivers/infiniband/hw/mlx5/main.c if ((MLX5_CAP_GEN(dev->mdev, port_type) == MLX5_CAP_PORT_TYPE_ETH) && MLX5_CAP_GEN 6418 drivers/infiniband/hw/mlx5/main.c (MLX5_CAP_GEN(dev->mdev, disable_local_lb_uc) || MLX5_CAP_GEN 6419 drivers/infiniband/hw/mlx5/main.c MLX5_CAP_GEN(dev->mdev, disable_local_lb_mc))) MLX5_CAP_GEN 6490 drivers/infiniband/hw/mlx5/main.c port_type_cap = MLX5_CAP_GEN(mdev, port_type); MLX5_CAP_GEN 6511 drivers/infiniband/hw/mlx5/main.c port_type_cap = MLX5_CAP_GEN(mdev, port_type); MLX5_CAP_GEN 6537 drivers/infiniband/hw/mlx5/main.c port_type_cap = MLX5_CAP_GEN(mdev, port_type); MLX5_CAP_GEN 6578 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(dev->mdev, max_qp_cnt)) { MLX5_CAP_GEN 6589 drivers/infiniband/hw/mlx5/main.c if (MLX5_CAP_GEN(dev->mdev, max_qp_cnt)) MLX5_CAP_GEN 6911 drivers/infiniband/hw/mlx5/main.c port_type_cap = MLX5_CAP_GEN(mdev, port_type); MLX5_CAP_GEN 6917 drivers/infiniband/hw/mlx5/main.c num_ports = max(MLX5_CAP_GEN(mdev, num_ports), MLX5_CAP_GEN 6918 drivers/infiniband/hw/mlx5/main.c MLX5_CAP_GEN(mdev, num_vhca_ports)); MLX5_CAP_GEN 1462 drivers/infiniband/hw/mlx5/mlx5_ib.h return lib_support && MLX5_CAP_GEN(dev->mdev, uar_4k) ? MLX5_CAP_GEN 1485 drivers/infiniband/hw/mlx5/mlx5_ib.h if (MLX5_CAP_GEN(dev->mdev, umr_modify_entity_size_disabled)) MLX5_CAP_GEN 1489 drivers/infiniband/hw/mlx5/mlx5_ib.h MLX5_CAP_GEN(dev->mdev, atomic) && MLX5_CAP_GEN 1490 drivers/infiniband/hw/mlx5/mlx5_ib.h MLX5_CAP_GEN(dev->mdev, umr_modify_atomic_disabled)) MLX5_CAP_GEN 57 drivers/infiniband/hw/mlx5/mr.c return !MLX5_CAP_GEN(dev->mdev, umr_indirect_mkey_disabled); MLX5_CAP_GEN 750 drivers/infiniband/hw/mlx5/mr.c if (MLX5_CAP_GEN(dev->mdev, umr_extended_translation_offset)) MLX5_CAP_GEN 1063 drivers/infiniband/hw/mlx5/mr.c bool pg_cap = !!(MLX5_CAP_GEN(dev->mdev, pg)); MLX5_CAP_GEN 1297 drivers/infiniband/hw/mlx5/mr.c } else if (!MLX5_CAP_GEN(dev->mdev, umr_extended_translation_offset)) { MLX5_CAP_GEN 335 drivers/infiniband/hw/mlx5/odp.c if (!MLX5_CAP_GEN(dev->mdev, pg) || MLX5_CAP_GEN 341 drivers/infiniband/hw/mlx5/odp.c if (MLX5_CAP_GEN(dev->mdev, umr_extended_translation_offset)) MLX5_CAP_GEN 388 drivers/infiniband/hw/mlx5/odp.c if (MLX5_CAP_GEN(dev->mdev, fixed_buffer_size) && MLX5_CAP_GEN 389 drivers/infiniband/hw/mlx5/odp.c MLX5_CAP_GEN(dev->mdev, null_mkey) && MLX5_CAP_GEN 390 drivers/infiniband/hw/mlx5/odp.c MLX5_CAP_GEN(dev->mdev, umr_extended_translation_offset) && MLX5_CAP_GEN 391 drivers/infiniband/hw/mlx5/odp.c !MLX5_CAP_GEN(dev->mdev, umr_indirect_mkey_disabled)) MLX5_CAP_GEN 850 drivers/infiniband/hw/mlx5/odp.c if (depth >= MLX5_CAP_GEN(dev->mdev, max_indirection)) { MLX5_CAP_GEN 337 drivers/infiniband/hw/mlx5/qp.c if (cap->max_recv_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) MLX5_CAP_GEN 363 drivers/infiniband/hw/mlx5/qp.c if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq)) { MLX5_CAP_GEN 366 drivers/infiniband/hw/mlx5/qp.c MLX5_CAP_GEN(dev->mdev, MLX5_CAP_GEN 490 drivers/infiniband/hw/mlx5/qp.c if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { MLX5_CAP_GEN 492 drivers/infiniband/hw/mlx5/qp.c wqe_size, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); MLX5_CAP_GEN 502 drivers/infiniband/hw/mlx5/qp.c if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { MLX5_CAP_GEN 506 drivers/infiniband/hw/mlx5/qp.c 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); MLX5_CAP_GEN 529 drivers/infiniband/hw/mlx5/qp.c if (desc_sz > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { MLX5_CAP_GEN 531 drivers/infiniband/hw/mlx5/qp.c desc_sz, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); MLX5_CAP_GEN 543 drivers/infiniband/hw/mlx5/qp.c if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { MLX5_CAP_GEN 546 drivers/infiniband/hw/mlx5/qp.c 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); MLX5_CAP_GEN 1055 drivers/infiniband/hw/mlx5/qp.c qp->bf.buf_size = (1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size)) / 2; MLX5_CAP_GEN 1260 drivers/infiniband/hw/mlx5/qp.c if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && MLX5_CAP_GEN 1889 drivers/infiniband/hw/mlx5/qp.c MLX5_CAP_GEN(dev->mdev, dc_req_scat_data_cqe)) MLX5_CAP_GEN 1916 drivers/infiniband/hw/mlx5/qp.c u8 atomic = MLX5_CAP_GEN(dev->mdev, atomic); MLX5_CAP_GEN 1983 drivers/infiniband/hw/mlx5/qp.c if (!MLX5_CAP_GEN(mdev, block_lb_mc)) { MLX5_CAP_GEN 1995 drivers/infiniband/hw/mlx5/qp.c if (!MLX5_CAP_GEN(mdev, cd)) { MLX5_CAP_GEN 2009 drivers/infiniband/hw/mlx5/qp.c if (!MLX5_CAP_GEN(mdev, ipoib_basic_offloads)) { MLX5_CAP_GEN 2019 drivers/infiniband/hw/mlx5/qp.c if (!MLX5_CAP_GEN(dev->mdev, eth_net_offloads) || MLX5_CAP_GEN 2031 drivers/infiniband/hw/mlx5/qp.c if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && MLX5_CAP_GEN 2062 drivers/infiniband/hw/mlx5/qp.c if (MLX5_CAP_GEN(dev->mdev, sctr_data_cqe)) MLX5_CAP_GEN 2091 drivers/infiniband/hw/mlx5/qp.c !MLX5_CAP_GEN(dev->mdev, qp_packet_based)) { MLX5_CAP_GEN 2100 drivers/infiniband/hw/mlx5/qp.c (MLX5_CAP_GEN(dev->mdev, port_type) != MLX5_CAP_GEN 2130 drivers/infiniband/hw/mlx5/qp.c 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz); MLX5_CAP_GEN 2252 drivers/infiniband/hw/mlx5/qp.c if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1) MLX5_CAP_GEN 2263 drivers/infiniband/hw/mlx5/qp.c if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { MLX5_CAP_GEN 2619 drivers/infiniband/hw/mlx5/qp.c if (!MLX5_CAP_GEN(dev->mdev, dct)) { MLX5_CAP_GEN 2686 drivers/infiniband/hw/mlx5/qp.c if (!MLX5_CAP_GEN(dev->mdev, xrc)) { MLX5_CAP_GEN 2847 drivers/infiniband/hw/mlx5/qp.c MLX5_CAP_GEN(dev->mdev, stat_rate_support))) MLX5_CAP_GEN 3170 drivers/infiniband/hw/mlx5/qp.c if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { MLX5_CAP_GEN 3525 drivers/infiniband/hw/mlx5/qp.c (u8)MLX5_CAP_GEN(dev->mdev, log_max_msg); MLX5_CAP_GEN 3822 drivers/infiniband/hw/mlx5/qp.c attr->port_num > MLX5_CAP_GEN(dev->mdev, num_ports)) { MLX5_CAP_GEN 3987 drivers/infiniband/hw/mlx5/qp.c (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_res_qp))) { MLX5_CAP_GEN 3995 drivers/infiniband/hw/mlx5/qp.c (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_req_qp))) { MLX5_CAP_GEN 4283 drivers/infiniband/hw/mlx5/qp.c MLX5_CAP_GEN(dev->mdev, umr_modify_entity_size_disabled)) || MLX5_CAP_GEN 4285 drivers/infiniband/hw/mlx5/qp.c MLX5_CAP_GEN(dev->mdev, umr_modify_atomic_disabled))) MLX5_CAP_GEN 4824 drivers/infiniband/hw/mlx5/qp.c (MLX5_CAP_GEN(dev->mdev, MLX5_CAP_GEN 5271 drivers/infiniband/hw/mlx5/qp.c err = set_reg_umr_segment(dev, seg, wr, !!(MLX5_CAP_GEN(mdev, atomic))); MLX5_CAP_GEN 5845 drivers/infiniband/hw/mlx5/qp.c if (!MLX5_CAP_GEN(dev->mdev, xrc)) MLX5_CAP_GEN 5950 drivers/infiniband/hw/mlx5/qp.c if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { MLX5_CAP_GEN 5973 drivers/infiniband/hw/mlx5/qp.c has_net_offloads = MLX5_CAP_GEN(dev->mdev, eth_net_offloads); MLX5_CAP_GEN 6024 drivers/infiniband/hw/mlx5/qp.c if (wq_init_attr->max_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_wq_sz))) MLX5_CAP_GEN 6073 drivers/infiniband/hw/mlx5/qp.c if (!MLX5_CAP_GEN(dev->mdev, striding_rq)) { MLX5_CAP_GEN 6214 drivers/infiniband/hw/mlx5/qp.c MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)) { MLX5_CAP_GEN 6217 drivers/infiniband/hw/mlx5/qp.c MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)); MLX5_CAP_GEN 6332 drivers/infiniband/hw/mlx5/qp.c if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && MLX5_CAP_GEN 6356 drivers/infiniband/hw/mlx5/qp.c if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { MLX5_CAP_GEN 6520 drivers/infiniband/hw/mlx5/qp.c if (!MLX5_CAP_GEN(dev->mdev, rts2rts_qp_counters_set_id)) { MLX5_CAP_GEN 116 drivers/infiniband/hw/mlx5/srq.c if (MLX5_CAP_GEN(dev->mdev, cqe_version) == MLX5_CQE_VERSION_V1 && MLX5_CAP_GEN 180 drivers/infiniband/hw/mlx5/srq.c if (MLX5_CAP_GEN(dev->mdev, cqe_version) == MLX5_CQE_VERSION_V1 && MLX5_CAP_GEN 227 drivers/infiniband/hw/mlx5/srq.c __u32 max_srq_wqes = 1 << MLX5_CAP_GEN(dev->mdev, log_max_srq_sz); MLX5_CAP_GEN 286 drivers/infiniband/hw/mlx5/srq.c MLX5_CAP_GEN(dev->mdev, log_tag_matching_list_sz)) { MLX5_CAP_GEN 48 drivers/net/ethernet/mellanox/mlx5/core/accel/tls.h if (!MLX5_CAP_GEN(mdev, tls_tx)) MLX5_CAP_GEN 51 drivers/net/ethernet/mellanox/mlx5/core/accel/tls.h if (!MLX5_CAP_GEN(mdev, log_max_dek)) MLX5_CAP_GEN 83 drivers/net/ethernet/mellanox/mlx5/core/en.h (6 + MLX5_CAP_GEN(mdev, cache_line_128byte)) /* HW restriction */ MLX5_CAP_GEN 171 drivers/net/ethernet/mellanox/mlx5/core/en.h return clamp_t(u8, MLX5_CAP_GEN(mdev, num_lag_ports), 1, MLX5_MAX_PORTS); MLX5_CAP_GEN 27 drivers/net/ethernet/mellanox/mlx5/core/en/monitor_stats.c if (!MLX5_CAP_GEN(mdev, max_num_of_monitor_counters)) MLX5_CAP_GEN 30 drivers/net/ethernet/mellanox/mlx5/core/en/monitor_stats.c MLX5_CAP_GEN(mdev, num_ppcnt_monitor_counters) < MLX5_CAP_GEN 33 drivers/net/ethernet/mellanox/mlx5/core/en/monitor_stats.c if (MLX5_CAP_GEN(mdev, num_q_monitor_counters) < MLX5_CAP_GEN 117 drivers/net/ethernet/mellanox/mlx5/core/en/monitor_stats.c int max_num_of_counters = MLX5_CAP_GEN(mdev, max_num_of_monitor_counters); MLX5_CAP_GEN 118 drivers/net/ethernet/mellanox/mlx5/core/en/monitor_stats.c int num_q_counters = MLX5_CAP_GEN(mdev, num_q_monitor_counters); MLX5_CAP_GEN 120 drivers/net/ethernet/mellanox/mlx5/core/en/monitor_stats.c MLX5_CAP_GEN(mdev, num_ppcnt_monitor_counters); MLX5_CAP_GEN 103 drivers/net/ethernet/mellanox/mlx5/core/en/params.c if (MLX5_CAP_GEN(mdev, ext_stride_num_range)) MLX5_CAP_GEN 452 drivers/net/ethernet/mellanox/mlx5/core/en/port.c if (!MLX5_CAP_GEN(dev, pcam_reg)) MLX5_CAP_GEN 479 drivers/net/ethernet/mellanox/mlx5/core/en/port.c if (!MLX5_CAP_GEN(dev, pcam_reg)) MLX5_CAP_GEN 514 drivers/net/ethernet/mellanox/mlx5/core/en/port.c if (!MLX5_CAP_GEN(dev, pcam_reg)) MLX5_CAP_GEN 42 drivers/net/ethernet/mellanox/mlx5/core/en/port_buffer.h #define MLX5_BUFFER_SUPPORTED(mdev) (MLX5_CAP_GEN(mdev, pcam_reg) && \ MLX5_CAP_GEN 12 drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_geneve.c return !!(MLX5_CAP_GEN(priv->mdev, flex_parser_protocols) & MLX5_FLEX_PROTO_GENEVE); MLX5_CAP_GEN 159 drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_geneve.c u8 max_tlv_option_data_len = MLX5_CAP_GEN(priv->mdev, max_geneve_tlv_option_data_len); MLX5_CAP_GEN 160 drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_geneve.c u8 max_tlv_options = MLX5_CAP_GEN(priv->mdev, max_geneve_tlv_options); MLX5_CAP_GEN 272 drivers/net/ethernet/mellanox/mlx5/core/en_accel/tls_rxtx.c if (MLX5_CAP_GEN(sq->channel->mdev, tls_tx)) { MLX5_CAP_GEN 52 drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c #define MLX5_DSCP_SUPPORTED(mdev) (MLX5_CAP_GEN(mdev, qcam_reg) && \ MLX5_CAP_GEN 84 drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c if (!MLX5_CAP_GEN(priv->mdev, dcbx)) MLX5_CAP_GEN 109 drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c if (!MLX5_CAP_GEN(priv->mdev, ets)) MLX5_CAP_GEN 318 drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c if (!MLX5_CAP_GEN(priv->mdev, ets)) MLX5_CAP_GEN 414 drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c if ((!mode) && MLX5_CAP_GEN(priv->mdev, dcbx)) { MLX5_CAP_GEN 446 drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c if (!MLX5_CAP_GEN(priv->mdev, vport_group_manager) || MLX5_CAP_GEN 499 drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c if (!MLX5_CAP_GEN(priv->mdev, vport_group_manager) || MLX5_CAP_GEN 621 drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c if (!MLX5_CAP_GEN(mdev, ets)) MLX5_CAP_GEN 730 drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c if (!MLX5_CAP_GEN(priv->mdev, ets)) { MLX5_CAP_GEN 1035 drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c if (!MLX5_CAP_GEN(priv->mdev, ets)) MLX5_CAP_GEN 1068 drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c if (!MLX5_CAP_GEN(priv->mdev, vport_group_manager)) MLX5_CAP_GEN 1189 drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c if (!MLX5_CAP_GEN(priv->mdev, qos)) MLX5_CAP_GEN 1192 drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c if (MLX5_CAP_GEN(priv->mdev, dcbx)) MLX5_CAP_GEN 486 drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c if (!MLX5_CAP_GEN(priv->mdev, cq_moderation)) MLX5_CAP_GEN 545 drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c if (!MLX5_CAP_GEN(mdev, cq_moderation)) MLX5_CAP_GEN 1336 drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c if (!MLX5_CAP_GEN(mdev, vport_group_manager)) MLX5_CAP_GEN 1368 drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz) || MLX5_CAP_GEN 1397 drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c if (MLX5_CAP_GEN(mdev, wol_g)) MLX5_CAP_GEN 1400 drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c if (MLX5_CAP_GEN(mdev, wol_s)) MLX5_CAP_GEN 1403 drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c if (MLX5_CAP_GEN(mdev, wol_a)) MLX5_CAP_GEN 1406 drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c if (MLX5_CAP_GEN(mdev, wol_b)) MLX5_CAP_GEN 1409 drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c if (MLX5_CAP_GEN(mdev, wol_m)) MLX5_CAP_GEN 1412 drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c if (MLX5_CAP_GEN(mdev, wol_u)) MLX5_CAP_GEN 1415 drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c if (MLX5_CAP_GEN(mdev, wol_p)) MLX5_CAP_GEN 1589 drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c if (!MLX5_CAP_GEN(mdev, beacon_led)) MLX5_CAP_GEN 1736 drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c !MLX5_CAP_GEN(mdev, cq_period_start_from_cqe)) MLX5_CAP_GEN 1772 drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c if (!MLX5_CAP_GEN(priv->mdev, cqe_compression)) MLX5_CAP_GEN 1803 drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c if (!MLX5_CAP_GEN(mdev, cqe_compression)) MLX5_CAP_GEN 124 drivers/net/ethernet/mellanox/mlx5/core/en_fs.c max_list_size = 1 << MLX5_CAP_GEN(priv->mdev, log_max_vlan_list); MLX5_CAP_GEN 520 drivers/net/ethernet/mellanox/mlx5/core/en_fs.c 1 << MLX5_CAP_GEN(priv->mdev, log_max_current_uc_list) : MLX5_CAP_GEN 521 drivers/net/ethernet/mellanox/mlx5/core/en_fs.c 1 << MLX5_CAP_GEN(priv->mdev, log_max_current_mc_list); MLX5_CAP_GEN 70 drivers/net/ethernet/mellanox/mlx5/core/en_main.c bool striding_rq_umr = MLX5_CAP_GEN(mdev, striding_rq) && MLX5_CAP_GEN 71 drivers/net/ethernet/mellanox/mlx5/core/en_main.c MLX5_CAP_GEN(mdev, umr_ptr_rlky) && MLX5_CAP_GEN 73 drivers/net/ethernet/mellanox/mlx5/core/en_main.c u16 max_wqe_sz_cap = MLX5_CAP_GEN(mdev, max_wqe_sz_sq); MLX5_CAP_GEN 1665 drivers/net/ethernet/mellanox/mlx5/core/en_main.c if (MLX5_CAP_GEN(mdev, cq_moderation)) MLX5_CAP_GEN 1957 drivers/net/ethernet/mellanox/mlx5/core/en_main.c u16 port_aff_bias = mlx5_core_is_pf(mdev) ? 0 : MLX5_CAP_GEN(mdev, vhca_id); MLX5_CAP_GEN 2234 drivers/net/ethernet/mellanox/mlx5/core/en_main.c if (MLX5_CAP_GEN(priv->mdev, cqe_128_always) && cache_line_size() >= 128) MLX5_CAP_GEN 3234 drivers/net/ethernet/mellanox/mlx5/core/en_main.c return MLX5_CAP_GEN(mdev, lag_tx_port_affinity) && mlx5e_get_num_lag_ports(mdev) > 1; MLX5_CAP_GEN 3995 drivers/net/ethernet/mellanox/mlx5/core/en_main.c if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz) || MLX5_CAP_GEN 4063 drivers/net/ethernet/mellanox/mlx5/core/en_main.c if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz)) MLX5_CAP_GEN 4637 drivers/net/ethernet/mellanox/mlx5/core/en_main.c if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH) MLX5_CAP_GEN 4639 drivers/net/ethernet/mellanox/mlx5/core/en_main.c if (!MLX5_CAP_GEN(mdev, eth_net_offloads) || MLX5_CAP_GEN 4640 drivers/net/ethernet/mellanox/mlx5/core/en_main.c !MLX5_CAP_GEN(mdev, nic_flow_table) || MLX5_CAP_GEN 4654 drivers/net/ethernet/mellanox/mlx5/core/en_main.c if (!MLX5_CAP_GEN(mdev, cq_moderation)) MLX5_CAP_GEN 4818 drivers/net/ethernet/mellanox/mlx5/core/en_main.c if (MLX5_CAP_GEN(mdev, cqe_compression) && MLX5_CAP_GEN 4819 drivers/net/ethernet/mellanox/mlx5/core/en_main.c MLX5_CAP_GEN(mdev, vport_group_manager)) MLX5_CAP_GEN 4839 drivers/net/ethernet/mellanox/mlx5/core/en_main.c rx_cq_period_mode = MLX5_CAP_GEN(mdev, cq_period_start_from_cqe) ? MLX5_CAP_GEN 4842 drivers/net/ethernet/mellanox/mlx5/core/en_main.c params->rx_dim_enabled = MLX5_CAP_GEN(mdev, cq_moderation); MLX5_CAP_GEN 4843 drivers/net/ethernet/mellanox/mlx5/core/en_main.c params->tx_dim_enabled = MLX5_CAP_GEN(mdev, cq_moderation); MLX5_CAP_GEN 4865 drivers/net/ethernet/mellanox/mlx5/core/en_main.c !MLX5_CAP_GEN(priv->mdev, vport_group_manager)) { MLX5_CAP_GEN 4883 drivers/net/ethernet/mellanox/mlx5/core/en_main.c if (MLX5_CAP_GEN(mdev, vport_group_manager) && MLX5_CAP_GEN(mdev, qos)) MLX5_CAP_GEN 1414 drivers/net/ethernet/mellanox/mlx5/core/en_rep.c u8 cq_period_mode = MLX5_CAP_GEN(mdev, cq_period_start_from_cqe) ? MLX5_CAP_GEN 1432 drivers/net/ethernet/mellanox/mlx5/core/en_rep.c params->rx_dim_enabled = MLX5_CAP_GEN(mdev, cq_moderation); MLX5_CAP_GEN 1458 drivers/net/ethernet/mellanox/mlx5/core/en_rep.c if (MLX5_CAP_GEN(mdev, qos)) MLX5_CAP_GEN 1807 drivers/net/ethernet/mellanox/mlx5/core/en_rep.c return (MLX5_CAP_GEN(dev, vhca_id) << 16) | vport_num; MLX5_CAP_GEN 388 drivers/net/ethernet/mellanox/mlx5/core/en_stats.c (MLX5_CAP_GEN(dev, nic_receive_steering_discard) ? \ MLX5_CAP_GEN 391 drivers/net/ethernet/mellanox/mlx5/core/en_stats.c (MLX5_CAP_GEN(dev, vnic_env_int_rq_oob) ? \ MLX5_CAP_GEN 437 drivers/net/ethernet/mellanox/mlx5/core/en_stats.c if (!MLX5_CAP_GEN(priv->mdev, nic_receive_steering_discard)) MLX5_CAP_GEN 585 drivers/net/ethernet/mellanox/mlx5/core/en_stats.c (MLX5_CAP_GEN(mdev, pcam_reg) ? MLX5_CAP_PCAM_REG(mdev, ppcnt) : 1) MLX5_CAP_GEN 1015 drivers/net/ethernet/mellanox/mlx5/core/en_stats.c if (!MLX5_CAP_GEN(mdev, sbcam_reg)) MLX5_CAP_GEN 1027 drivers/net/ethernet/mellanox/mlx5/core/en_stats.c if (!MLX5_CAP_GEN(mdev, sbcam_reg)) MLX5_CAP_GEN 1049 drivers/net/ethernet/mellanox/mlx5/core/en_stats.c if (!MLX5_CAP_GEN(mdev, sbcam_reg)) MLX5_CAP_GEN 1075 drivers/net/ethernet/mellanox/mlx5/core/en_stats.c if (!MLX5_CAP_GEN(mdev, sbcam_reg)) MLX5_CAP_GEN 1091 drivers/net/ethernet/mellanox/mlx5/core/en_stats.c if (!MLX5_CAP_GEN(mdev, sbcam_reg)) MLX5_CAP_GEN 1106 drivers/net/ethernet/mellanox/mlx5/core/en_stats.c if (!MLX5_CAP_GEN(mdev, sbcam_reg)) MLX5_CAP_GEN 1204 drivers/net/ethernet/mellanox/mlx5/core/en_stats.c if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH) MLX5_CAP_GEN 1219 drivers/net/ethernet/mellanox/mlx5/core/en_stats.c if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH) MLX5_CAP_GEN 788 drivers/net/ethernet/mellanox/mlx5/core/en_tc.c if (!MLX5_CAP_GEN(priv->mdev, hairpin) || !MLX5_CAP_GEN(peer_mdev, hairpin)) { MLX5_CAP_GEN 793 drivers/net/ethernet/mellanox/mlx5/core/en_tc.c peer_id = MLX5_CAP_GEN(peer_mdev, vhca_id); MLX5_CAP_GEN 832 drivers/net/ethernet/mellanox/mlx5/core/en_tc.c MLX5_CAP_GEN(priv->mdev, log_max_hairpin_wq_data_sz)); MLX5_CAP_GEN 834 drivers/net/ethernet/mellanox/mlx5/core/en_tc.c MLX5_CAP_GEN(priv->mdev, log_min_hairpin_wq_data_sz)); MLX5_CAP_GEN 839 drivers/net/ethernet/mellanox/mlx5/core/en_tc.c MLX5_CAP_GEN(priv->mdev, log_max_hairpin_num_packets)); MLX5_CAP_GEN 960 drivers/net/ethernet/mellanox/mlx5/core/en_tc.c max_flow_counter = (MLX5_CAP_GEN(dev, max_flow_counter_31_16) << 16) | MLX5_CAP_GEN 961 drivers/net/ethernet/mellanox/mlx5/core/en_tc.c MLX5_CAP_GEN(dev, max_flow_counter_15_0); MLX5_CAP_GEN 3407 drivers/net/ethernet/mellanox/mlx5/core/en_tc.c if (MLX5_CAP_GEN(esw->dev, prio_tag_required) && MLX5_CAP_GEN 4062 drivers/net/ethernet/mellanox/mlx5/core/en_tc.c peer_vhca_id = MLX5_CAP_GEN(peer_mdev, vhca_id); MLX5_CAP_GEN 283 drivers/net/ethernet/mellanox/mlx5/core/eq.c if (!param->mask[0] && MLX5_CAP_GEN(dev, log_max_uctx)) MLX5_CAP_GEN 530 drivers/net/ethernet/mellanox/mlx5/core/eq.c if (MLX5_CAP_GEN(dev, general_notification_event)) MLX5_CAP_GEN 533 drivers/net/ethernet/mellanox/mlx5/core/eq.c if (MLX5_CAP_GEN(dev, port_module_event)) MLX5_CAP_GEN 541 drivers/net/ethernet/mellanox/mlx5/core/eq.c if (MLX5_CAP_GEN(dev, fpga)) MLX5_CAP_GEN 547 drivers/net/ethernet/mellanox/mlx5/core/eq.c if (MLX5_CAP_GEN(dev, temp_warn_event)) MLX5_CAP_GEN 553 drivers/net/ethernet/mellanox/mlx5/core/eq.c if (MLX5_CAP_GEN(dev, max_num_of_monitor_counters)) MLX5_CAP_GEN 562 drivers/net/ethernet/mellanox/mlx5/core/eq.c if (MLX5_CAP_GEN(dev, event_cap)) MLX5_CAP_GEN 69 drivers/net/ethernet/mellanox/mlx5/core/eswitch.c if (!esw || !MLX5_CAP_GEN(esw->dev, vport_group_manager)) MLX5_CAP_GEN 1443 drivers/net/ethernet/mellanox/mlx5/core/eswitch.c if (!MLX5_CAP_GEN(dev, qos) || !MLX5_CAP_QOS(dev, esw_scheduling)) MLX5_CAP_GEN 1495 drivers/net/ethernet/mellanox/mlx5/core/eswitch.c if (!esw->qos.enabled || !MLX5_CAP_GEN(dev, qos) || MLX5_CAP_GEN 1555 drivers/net/ethernet/mellanox/mlx5/core/eswitch.c if (!MLX5_CAP_GEN(dev, qos) || !MLX5_CAP_QOS(dev, esw_scheduling)) MLX5_CAP_GEN 2477 drivers/net/ethernet/mellanox/mlx5/core/eswitch.c if (!MLX5_CAP_GEN(dev, receive_discard_vport_down) && MLX5_CAP_GEN 2478 drivers/net/ethernet/mellanox/mlx5/core/eswitch.c !MLX5_CAP_GEN(dev, transmit_discard_vport_down)) MLX5_CAP_GEN 2487 drivers/net/ethernet/mellanox/mlx5/core/eswitch.c if (MLX5_CAP_GEN(dev, receive_discard_vport_down)) MLX5_CAP_GEN 2489 drivers/net/ethernet/mellanox/mlx5/core/eswitch.c if (MLX5_CAP_GEN(dev, transmit_discard_vport_down)) MLX5_CAP_GEN 49 drivers/net/ethernet/mellanox/mlx5/core/eswitch.h (1 << MLX5_CAP_GEN(dev, log_max_current_uc_list)) MLX5_CAP_GEN 52 drivers/net/ethernet/mellanox/mlx5/core/eswitch.h (1 << MLX5_CAP_GEN(dev, log_max_current_mc_list)) MLX5_CAP_GEN 122 drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c MLX5_CAP_GEN(attr->in_mdev, vhca_id)); MLX5_CAP_GEN 187 drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c MLX5_CAP_GEN(attr->dests[j].mdev, vhca_id); MLX5_CAP_GEN 274 drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c MLX5_CAP_GEN(attr->dests[i].mdev, vhca_id); MLX5_CAP_GEN 643 drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c MLX5_CAP_GEN(peer_dev, vhca_id)); MLX5_CAP_GEN 656 drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c dest->vport.vhca_id = MLX5_CAP_GEN(peer_dev, vhca_id); MLX5_CAP_GEN 1078 drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c max_flow_counter = (MLX5_CAP_GEN(dev, max_flow_counter_31_16) << 16) | MLX5_CAP_GEN 1079 drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c MLX5_CAP_GEN(dev, max_flow_counter_15_0); MLX5_CAP_GEN 1866 drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c if (!MLX5_CAP_GEN(esw->dev, prio_tag_required)) MLX5_CAP_GEN 1928 drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c !MLX5_CAP_GEN(esw->dev, prio_tag_required)) MLX5_CAP_GEN 1950 drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c if (MLX5_CAP_GEN(esw->dev, prio_tag_required) && MLX5_CAP_GEN 2303 drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c if (MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH) MLX5_CAP_GEN 2430 drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c if (!MLX5_CAP_GEN(dev, vport_group_manager)) MLX5_CAP_GEN 2606 drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c return ((MLX5_CAP_GEN(esw->dev, vhca_id) & 0xffff) << 16) | vport_num; MLX5_CAP_GEN 597 drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c if (MLX5_CAP_GEN(mdev, cqe_version) == 1) MLX5_CAP_GEN 731 drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c MLX5_SET(qpc, qpc, log_msg_max, (u8)MLX5_CAP_GEN(mdev, log_max_msg)); MLX5_CAP_GEN 240 drivers/net/ethernet/mellanox/mlx5/core/fpga/core.c if (!MLX5_CAP_GEN(mdev, fpga)) { MLX5_CAP_GEN 126 drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.c if (!mdev->fpga || !MLX5_CAP_GEN(mdev, fpga)) MLX5_CAP_GEN 389 drivers/net/ethernet/mellanox/mlx5/core/fpga/tls.c if (!mdev->fpga || !MLX5_CAP_GEN(mdev, fpga)) MLX5_CAP_GEN 162 drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c if ((MLX5_CAP_GEN(dev, port_type) == MLX5_CAP_PORT_TYPE_IB) && MLX5_CAP_GEN 2758 drivers/net/ethernet/mellanox/mlx5/core/fs_core.c if ((((MLX5_CAP_GEN(dev, port_type) == MLX5_CAP_PORT_TYPE_ETH) && MLX5_CAP_GEN 2759 drivers/net/ethernet/mellanox/mlx5/core/fs_core.c (MLX5_CAP_GEN(dev, nic_flow_table))) || MLX5_CAP_GEN 2760 drivers/net/ethernet/mellanox/mlx5/core/fs_core.c ((MLX5_CAP_GEN(dev, port_type) == MLX5_CAP_PORT_TYPE_IB) && MLX5_CAP_GEN 2761 drivers/net/ethernet/mellanox/mlx5/core/fs_core.c MLX5_CAP_GEN(dev, ipoib_enhanced_offloads))) && MLX5_CAP_GEN 150 drivers/net/ethernet/mellanox/mlx5/core/fs_counters.c (1 << MLX5_CAP_GEN(dev, log_max_flow_counter_bulk))); MLX5_CAP_GEN 290 drivers/net/ethernet/mellanox/mlx5/core/fs_counters.c if (aging && MLX5_CAP_GEN(dev, flow_counter_bulk_alloc) != 0) { MLX5_CAP_GEN 497 drivers/net/ethernet/mellanox/mlx5/core/fs_counters.c alloc_bitmask = MLX5_CAP_GEN(dev, flow_counter_bulk_alloc); MLX5_CAP_GEN 156 drivers/net/ethernet/mellanox/mlx5/core/fw.c if (MLX5_CAP_GEN(dev, eth_net_offloads)) { MLX5_CAP_GEN 162 drivers/net/ethernet/mellanox/mlx5/core/fw.c if (MLX5_CAP_GEN(dev, ipoib_enhanced_offloads)) { MLX5_CAP_GEN 168 drivers/net/ethernet/mellanox/mlx5/core/fw.c if (MLX5_CAP_GEN(dev, pg)) { MLX5_CAP_GEN 174 drivers/net/ethernet/mellanox/mlx5/core/fw.c if (MLX5_CAP_GEN(dev, atomic)) { MLX5_CAP_GEN 180 drivers/net/ethernet/mellanox/mlx5/core/fw.c if (MLX5_CAP_GEN(dev, roce)) { MLX5_CAP_GEN 186 drivers/net/ethernet/mellanox/mlx5/core/fw.c if (MLX5_CAP_GEN(dev, nic_flow_table) || MLX5_CAP_GEN 187 drivers/net/ethernet/mellanox/mlx5/core/fw.c MLX5_CAP_GEN(dev, ipoib_enhanced_offloads)) { MLX5_CAP_GEN 193 drivers/net/ethernet/mellanox/mlx5/core/fw.c if (MLX5_CAP_GEN(dev, vport_group_manager) && MLX5_CAP_GEN 206 drivers/net/ethernet/mellanox/mlx5/core/fw.c if (MLX5_CAP_GEN(dev, vector_calc)) { MLX5_CAP_GEN 212 drivers/net/ethernet/mellanox/mlx5/core/fw.c if (MLX5_CAP_GEN(dev, qos)) { MLX5_CAP_GEN 218 drivers/net/ethernet/mellanox/mlx5/core/fw.c if (MLX5_CAP_GEN(dev, debug)) MLX5_CAP_GEN 221 drivers/net/ethernet/mellanox/mlx5/core/fw.c if (MLX5_CAP_GEN(dev, pcam_reg)) MLX5_CAP_GEN 224 drivers/net/ethernet/mellanox/mlx5/core/fw.c if (MLX5_CAP_GEN(dev, mcam_reg)) MLX5_CAP_GEN 227 drivers/net/ethernet/mellanox/mlx5/core/fw.c if (MLX5_CAP_GEN(dev, qcam_reg)) MLX5_CAP_GEN 230 drivers/net/ethernet/mellanox/mlx5/core/fw.c if (MLX5_CAP_GEN(dev, device_memory)) { MLX5_CAP_GEN 236 drivers/net/ethernet/mellanox/mlx5/core/fw.c if (MLX5_CAP_GEN(dev, event_cap)) { MLX5_CAP_GEN 242 drivers/net/ethernet/mellanox/mlx5/core/fw.c if (MLX5_CAP_GEN(dev, tls_tx)) { MLX5_CAP_GEN 259 drivers/net/ethernet/mellanox/mlx5/core/fw.c if (MLX5_CAP_GEN(dev, sw_owner_id)) { MLX5_CAP_GEN 284 drivers/net/ethernet/mellanox/mlx5/core/fw.c if (!MLX5_CAP_GEN(dev, force_teardown)) { MLX5_CAP_GEN 314 drivers/net/ethernet/mellanox/mlx5/core/fw.c if (!MLX5_CAP_GEN(dev, fast_teardown)) { MLX5_CAP_GEN 496 drivers/net/ethernet/mellanox/mlx5/core/fw.c if (!MLX5_CAP_GEN(dev, mcam_reg) || !MLX5_CAP_MCAM_REG(dev, mcqi)) { MLX5_CAP_GEN 631 drivers/net/ethernet/mellanox/mlx5/core/fw.c if (!MLX5_CAP_GEN(dev, mcam_reg) || MLX5_CAP_GEN 732 drivers/net/ethernet/mellanox/mlx5/core/fw.c if (!MLX5_CAP_GEN(dev, mcam_reg) || !MLX5_CAP_MCAM_REG(dev, mcqi) || MLX5_CAP_GEN 646 drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_IB) MLX5_CAP_GEN 649 drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c if (!MLX5_CAP_GEN(mdev, ipoib_enhanced_offloads)) { MLX5_CAP_GEN 565 drivers/net/ethernet/mellanox/mlx5/core/lag.c if (!MLX5_CAP_GEN(dev, vport_group_manager) || MLX5_CAP_GEN 566 drivers/net/ethernet/mellanox/mlx5/core/lag.c !MLX5_CAP_GEN(dev, lag_master) || MLX5_CAP_GEN 567 drivers/net/ethernet/mellanox/mlx5/core/lag.c (MLX5_CAP_GEN(dev, num_lag_ports) != MLX5_MAX_PORTS)) MLX5_CAP_GEN 523 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c dev_freq = MLX5_CAP_GEN(mdev, device_frequency_khz); MLX5_CAP_GEN 599 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c if (!MLX5_CAP_GEN(mdev, device_frequency_khz)) MLX5_CAP_GEN 136 drivers/net/ethernet/mellanox/mlx5/core/lib/gid.c if (MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH) MLX5_CAP_GEN 151 drivers/net/ethernet/mellanox/mlx5/core/lib/gid.c if (MLX5_CAP_GEN(dev, num_vhca_ports) > 0) MLX5_CAP_GEN 100 drivers/net/ethernet/mellanox/mlx5/core/lib/mpfs.c int l2table_size = 1 << MLX5_CAP_GEN(dev, log_max_l2_table); MLX5_CAP_GEN 29 drivers/net/ethernet/mellanox/mlx5/core/lib/port_tun.c if (!MLX5_CAP_GEN(mdev, ports_check)) MLX5_CAP_GEN 213 drivers/net/ethernet/mellanox/mlx5/core/main.c if (!MLX5_CAP_GEN(dev, driver_version)) MLX5_CAP_GEN 426 drivers/net/ethernet/mellanox/mlx5/core/main.c if (MLX5_CAP_GEN(dev, atomic)) { MLX5_CAP_GEN 466 drivers/net/ethernet/mellanox/mlx5/core/main.c !MLX5_CAP_GEN(dev, pg)) MLX5_CAP_GEN 537 drivers/net/ethernet/mellanox/mlx5/core/main.c mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(dev, pkey_table_size)), MLX5_CAP_GEN 636 drivers/net/ethernet/mellanox/mlx5/core/main.c if (MLX5_CAP_GEN(dev, port_type) == MLX5_CAP_PORT_TYPE_ETH) MLX5_CAP_GEN 1505 drivers/net/ethernet/mellanox/mlx5/core/main.c fast_teardown = MLX5_CAP_GEN(dev, fast_teardown); MLX5_CAP_GEN 1506 drivers/net/ethernet/mellanox/mlx5/core/main.c force_teardown = MLX5_CAP_GEN(dev, force_teardown); MLX5_CAP_GEN 204 drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h #define MLX5_PPS_CAP(mdev) (MLX5_CAP_GEN((mdev), pps) && \ MLX5_CAP_GEN 205 drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h MLX5_CAP_GEN((mdev), pps_modify) && \ MLX5_CAP_GEN 229 drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h return MLX5_CAP_GEN(dev, vport_group_manager) && MLX5_CAP_GEN 230 drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h (MLX5_CAP_GEN(dev, num_lag_ports) > 1) && MLX5_CAP_GEN 231 drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h MLX5_CAP_GEN(dev, lag_master); MLX5_CAP_GEN 265 drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c int num_eqs = MLX5_CAP_GEN(dev, max_num_eqs) ? MLX5_CAP_GEN 266 drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c MLX5_CAP_GEN(dev, max_num_eqs) : MLX5_CAP_GEN 267 drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c 1 << MLX5_CAP_GEN(dev, log_max_eq); MLX5_CAP_GEN 271 drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c nvec = MLX5_CAP_GEN(dev, num_ports) * num_online_cpus() + MLX5_CAP_GEN 548 drivers/net/ethernet/mellanox/mlx5/core/port.c u8 num_tc = MLX5_CAP_GEN(mdev, max_tc) ? : 8; MLX5_CAP_GEN 624 drivers/net/ethernet/mellanox/mlx5/core/port.c if (!MLX5_CAP_GEN(mdev, ets)) MLX5_CAP_GEN 636 drivers/net/ethernet/mellanox/mlx5/core/port.c if (!MLX5_CAP_GEN(mdev, ets)) MLX5_CAP_GEN 829 drivers/net/ethernet/mellanox/mlx5/core/port.c if (!MLX5_CAP_GEN(mdev, ports_check)) MLX5_CAP_GEN 243 drivers/net/ethernet/mellanox/mlx5/core/rl.c if (!MLX5_CAP_GEN(dev, qos) || !MLX5_CAP_QOS(dev, packet_pacing)) { MLX5_CAP_GEN 96 drivers/net/ethernet/mellanox/mlx5/core/sriov.c if (MLX5_CAP_GEN(dev, port_type) == MLX5_CAP_PORT_TYPE_IB) { MLX5_CAP_GEN 464 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_action.c if (MLX5_CAP_GEN(dmn->mdev, prio_tag_required)) MLX5_CAP_GEN 91 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_cmd.c caps->prio_tag_required = MLX5_CAP_GEN(mdev, prio_tag_required); MLX5_CAP_GEN 92 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_cmd.c caps->eswitch_manager = MLX5_CAP_GEN(mdev, eswitch_manager); MLX5_CAP_GEN 93 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_cmd.c caps->gvmi = MLX5_CAP_GEN(mdev, vhca_id); MLX5_CAP_GEN 94 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_cmd.c caps->flex_protocols = MLX5_CAP_GEN(mdev, flex_parser_protocols); MLX5_CAP_GEN 97 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_cmd.c caps->flex_parser_id_icmp_dw0 = MLX5_CAP_GEN(mdev, flex_parser_id_icmp_dw0); MLX5_CAP_GEN 98 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_cmd.c caps->flex_parser_id_icmp_dw1 = MLX5_CAP_GEN(mdev, flex_parser_id_icmp_dw1); MLX5_CAP_GEN 103 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_cmd.c MLX5_CAP_GEN(mdev, flex_parser_id_icmpv6_dw0); MLX5_CAP_GEN 105 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_cmd.c MLX5_CAP_GEN(mdev, flex_parser_id_icmpv6_dw1); MLX5_CAP_GEN 215 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_domain.c if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH) { MLX5_CAP_GEN 177 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_send.c if (MLX5_CAP_GEN(mdev, cqe_version) == 1) MLX5_CAP_GEN 432 drivers/net/ethernet/mellanox/mlx5/core/transobj.c MLX5_CAP_GEN(hp->func_mdev, vhca_id), hp->rqn[i]); MLX5_CAP_GEN 441 drivers/net/ethernet/mellanox/mlx5/core/transobj.c MLX5_CAP_GEN(hp->peer_mdev, vhca_id), hp->sqn[i]); MLX5_CAP_GEN 67 drivers/net/ethernet/mellanox/mlx5/core/uar.c if (MLX5_CAP_GEN(mdev, uar_4k)) MLX5_CAP_GEN 68 drivers/net/ethernet/mellanox/mlx5/core/uar.c return MLX5_CAP_GEN(mdev, num_of_uars_per_page); MLX5_CAP_GEN 77 drivers/net/ethernet/mellanox/mlx5/core/uar.c if (MLX5_CAP_GEN(mdev, uar_4k)) MLX5_CAP_GEN 203 drivers/net/ethernet/mellanox/mlx5/core/uar.c (1 << MLX5_CAP_GEN(mdev, log_bf_reg_size)) + MLX5_BF_OFFSET; MLX5_CAP_GEN 283 drivers/net/ethernet/mellanox/mlx5/core/uar.c bf_reg_size = 1 << MLX5_CAP_GEN(dev, log_bf_reg_size); MLX5_CAP_GEN 286 drivers/net/ethernet/mellanox/mlx5/core/vport.c 1 << MLX5_CAP_GEN(dev, log_max_current_uc_list) : MLX5_CAP_GEN 287 drivers/net/ethernet/mellanox/mlx5/core/vport.c 1 << MLX5_CAP_GEN(dev, log_max_current_mc_list); MLX5_CAP_GEN 344 drivers/net/ethernet/mellanox/mlx5/core/vport.c 1 << MLX5_CAP_GEN(dev, log_max_current_uc_list) : MLX5_CAP_GEN 345 drivers/net/ethernet/mellanox/mlx5/core/vport.c 1 << MLX5_CAP_GEN(dev, log_max_current_mc_list); MLX5_CAP_GEN 396 drivers/net/ethernet/mellanox/mlx5/core/vport.c max_list_size = 1 << MLX5_CAP_GEN(dev, log_max_vlan_list); MLX5_CAP_GEN 486 drivers/net/ethernet/mellanox/mlx5/core/vport.c if (!MLX5_CAP_GEN(mdev, vport_group_manager)) MLX5_CAP_GEN 544 drivers/net/ethernet/mellanox/mlx5/core/vport.c is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager); MLX5_CAP_GEN 545 drivers/net/ethernet/mellanox/mlx5/core/vport.c tbsz = mlx5_get_gid_table_len(MLX5_CAP_GEN(dev, gid_table_size)); MLX5_CAP_GEN 578 drivers/net/ethernet/mellanox/mlx5/core/vport.c if (MLX5_CAP_GEN(dev, num_ports) == 2) MLX5_CAP_GEN 611 drivers/net/ethernet/mellanox/mlx5/core/vport.c is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager); MLX5_CAP_GEN 613 drivers/net/ethernet/mellanox/mlx5/core/vport.c tbsz = mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(dev, pkey_table_size)); MLX5_CAP_GEN 643 drivers/net/ethernet/mellanox/mlx5/core/vport.c if (MLX5_CAP_GEN(dev, num_ports) == 2) MLX5_CAP_GEN 673 drivers/net/ethernet/mellanox/mlx5/core/vport.c is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager); MLX5_CAP_GEN 691 drivers/net/ethernet/mellanox/mlx5/core/vport.c if (MLX5_CAP_GEN(dev, num_ports) == 2) MLX5_CAP_GEN 848 drivers/net/ethernet/mellanox/mlx5/core/vport.c if (!MLX5_CAP_GEN(mdev, disable_local_lb_mc) && MLX5_CAP_GEN 849 drivers/net/ethernet/mellanox/mlx5/core/vport.c !MLX5_CAP_GEN(mdev, disable_local_lb_uc)) MLX5_CAP_GEN 861 drivers/net/ethernet/mellanox/mlx5/core/vport.c if (MLX5_CAP_GEN(mdev, disable_local_lb_mc)) MLX5_CAP_GEN 865 drivers/net/ethernet/mellanox/mlx5/core/vport.c if (MLX5_CAP_GEN(mdev, disable_local_lb_uc)) MLX5_CAP_GEN 979 drivers/net/ethernet/mellanox/mlx5/core/vport.c is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager); MLX5_CAP_GEN 997 drivers/net/ethernet/mellanox/mlx5/core/vport.c if (MLX5_CAP_GEN(dev, num_ports) == 2) MLX5_CAP_GEN 1045 drivers/net/ethernet/mellanox/mlx5/core/vport.c is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager); MLX5_CAP_GEN 1062 drivers/net/ethernet/mellanox/mlx5/core/vport.c if (MLX5_CAP_GEN(dev, num_ports) > 1) MLX5_CAP_GEN 1112 drivers/net/ethernet/mellanox/mlx5/core/vport.c MLX5_CAP_GEN(master_mdev, vhca_id)); MLX5_CAP_GEN 1115 drivers/net/ethernet/mellanox/mlx5/core/vport.c MLX5_CAP_GEN(port_mdev, affiliate_nic_vport_criteria)); MLX5_CAP_GEN 1154 drivers/net/ethernet/mellanox/mlx5/core/vport.c int port_type_cap = MLX5_CAP_GEN(mdev, port_type); MLX5_CAP_GEN 1133 include/linux/mlx5/driver.h return dev->caps.embedded_cpu && MLX5_CAP_GEN(dev, eswitch_manager); MLX5_CAP_GEN 1163 include/linux/mlx5/driver.h return MLX5_CAP_GEN(dev, affiliate_nic_vport_criteria) && MLX5_CAP_GEN 1164 include/linux/mlx5/driver.h MLX5_CAP_GEN(dev, num_vhca_ports) <= 1; MLX5_CAP_GEN 1169 include/linux/mlx5/driver.h return MLX5_CAP_GEN(dev, num_vhca_ports) > 1; MLX5_CAP_GEN 1183 include/linux/mlx5/driver.h return MLX5_CAP_GEN(dev, native_port_num); MLX5_CAP_GEN 12 include/linux/mlx5/eswitch.h #define MLX5_ESWITCH_MANAGER(mdev) MLX5_CAP_GEN(mdev, eswitch_manager) MLX5_CAP_GEN 48 include/linux/mlx5/vport.h (MLX5_CAP_GEN(mdev, vport_group_manager) && \ MLX5_CAP_GEN 49 include/linux/mlx5/vport.h (MLX5_CAP_GEN(mdev, port_type) == MLX5_CAP_PORT_TYPE_ETH) && \