MI_FLUSH_DW_USE_GTT  418 drivers/gpu/drm/i915/gt/intel_engine.h 	*cs++ = gtt_offset | MI_FLUSH_DW_USE_GTT;
MI_FLUSH_DW_USE_GTT 2762 drivers/gpu/drm/i915/gt/intel_lrc.c 	*cs++ = I915_GEM_HWS_SCRATCH_ADDR | MI_FLUSH_DW_USE_GTT;
MI_FLUSH_DW_USE_GTT  446 drivers/gpu/drm/i915/gt/intel_ringbuffer.c 	*cs++ = I915_GEM_HWS_SEQNO_ADDR | MI_FLUSH_DW_USE_GTT;
MI_FLUSH_DW_USE_GTT  466 drivers/gpu/drm/i915/gt/intel_ringbuffer.c 	*cs++ = I915_GEM_HWS_SEQNO_ADDR | MI_FLUSH_DW_USE_GTT;
MI_FLUSH_DW_USE_GTT 2072 drivers/gpu/drm/i915/gt/intel_ringbuffer.c 	*cs++ = I915_GEM_HWS_SCRATCH_ADDR | MI_FLUSH_DW_USE_GTT;
MI_FLUSH_DW_USE_GTT  345 drivers/gpu/drm/i915/i915_cmd_parser.c 			.mask = MI_FLUSH_DW_USE_GTT,
MI_FLUSH_DW_USE_GTT  389 drivers/gpu/drm/i915/i915_cmd_parser.c 			.mask = MI_FLUSH_DW_USE_GTT,
MI_FLUSH_DW_USE_GTT  426 drivers/gpu/drm/i915/i915_cmd_parser.c 			.mask = MI_FLUSH_DW_USE_GTT,