MII_TG3_DSP_RW_PORT 1291 drivers/net/ethernet/broadcom/tg3.c 		err = tg3_readphy(tp, MII_TG3_DSP_RW_PORT, val);
MII_TG3_DSP_RW_PORT 1302 drivers/net/ethernet/broadcom/tg3.c 		err = tg3_writephy(tp, MII_TG3_DSP_RW_PORT, val);
MII_TG3_DSP_RW_PORT 2487 drivers/net/ethernet/broadcom/tg3.c 			tg3_writephy(tp, MII_TG3_DSP_RW_PORT,
MII_TG3_DSP_RW_PORT 2513 drivers/net/ethernet/broadcom/tg3.c 			if (tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &low) ||
MII_TG3_DSP_RW_PORT 2514 drivers/net/ethernet/broadcom/tg3.c 			    tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &high) ||
MII_TG3_DSP_RW_PORT 2524 drivers/net/ethernet/broadcom/tg3.c 				tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x4001);
MII_TG3_DSP_RW_PORT 2525 drivers/net/ethernet/broadcom/tg3.c 				tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x4005);
MII_TG3_DSP_RW_PORT 2546 drivers/net/ethernet/broadcom/tg3.c 			tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x000);
MII_TG3_DSP_RW_PORT 2734 drivers/net/ethernet/broadcom/tg3.c 				tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x110b);
MII_TG3_DSP_RW_PORT 2738 drivers/net/ethernet/broadcom/tg3.c 				tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x010b);
MII_TG3_DSP_RW_PORT 6038 drivers/net/ethernet/broadcom/tg3.c 			tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &phy2);
MII_TG3_DSP_RW_PORT 6039 drivers/net/ethernet/broadcom/tg3.c 			tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &phy2);
MII_TG3_DSP_RW_PORT 6061 drivers/net/ethernet/broadcom/tg3.c 		tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &phy2);