MHL_TX_INTR1_ENABLE_REG 530 drivers/gpu/drm/bridge/sii9234.c mhl_tx_writeb(ctx, MHL_TX_INTR1_ENABLE_REG, 0x60); MHL_TX_INTR1_ENABLE_REG 678 drivers/gpu/drm/bridge/sii9234.c mhl_tx_writeb(ctx, MHL_TX_INTR1_ENABLE_REG, MHL_TX_INTR1_ENABLE_REG 763 drivers/gpu/drm/bridge/sii9234.c intr1_en = mhl_tx_readb(ctx, MHL_TX_INTR1_ENABLE_REG);