MG_PLL_DIV0      3077 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	hw_state->mg_pll_div0 = I915_READ(MG_PLL_DIV0(tc_port));
MG_PLL_DIV0      3219 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	I915_WRITE(MG_PLL_DIV0(tc_port), hw_state->mg_pll_div0);