MDBS               90 drivers/i2c/busses/i2c-rcar.c #define RCAR_BUS_PHASE_START	(MDBS | MIE | ESG)
MDBS               91 drivers/i2c/busses/i2c-rcar.c #define RCAR_BUS_PHASE_DATA	(MDBS | MIE)
MDBS               93 drivers/i2c/busses/i2c-rcar.c #define RCAR_BUS_PHASE_STOP	(MDBS | MIE | FSB)
MDBS              212 drivers/i2c/busses/i2c-rcar.c 	rcar_i2c_write(priv, ICMCR, MDBS);
MDBS              234 drivers/i2c/busses/i2c-rcar.c 	priv->recovery_icmcr = MDBS | OBPC | FSDA | FSCL;