MC_SEQ_WR_CTL_D0_LP 5904 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		*out_reg = MC_SEQ_WR_CTL_D0_LP;
MC_SEQ_WR_CTL_D0_LP 6006 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0));
MC_SEQ_WR_CTL_D0_LP 1880 drivers/gpu/drm/radeon/btc_dpm.c 		*out_reg = MC_SEQ_WR_CTL_D0_LP >> 2;
MC_SEQ_WR_CTL_D0_LP 2037 drivers/gpu/drm/radeon/btc_dpm.c 	WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0));
MC_SEQ_WR_CTL_D0_LP 4449 drivers/gpu/drm/radeon/ci_dpm.c 		*out_reg = MC_SEQ_WR_CTL_D0_LP >> 2;
MC_SEQ_WR_CTL_D0_LP 4649 drivers/gpu/drm/radeon/ci_dpm.c 	WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0));
MC_SEQ_WR_CTL_D0_LP  996 drivers/gpu/drm/radeon/cypress_dpm.c 	eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_WR_CTL_D0_LP >> 2;
MC_SEQ_WR_CTL_D0_LP 2792 drivers/gpu/drm/radeon/ni_dpm.c 		*out_reg = MC_SEQ_WR_CTL_D0_LP >> 2;
MC_SEQ_WR_CTL_D0_LP 2890 drivers/gpu/drm/radeon/ni_dpm.c 	WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0));
MC_SEQ_WR_CTL_D0_LP 5450 drivers/gpu/drm/radeon/si_dpm.c 		*out_reg = MC_SEQ_WR_CTL_D0_LP >> 2;
MC_SEQ_WR_CTL_D0_LP 5552 drivers/gpu/drm/radeon/si_dpm.c 	WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0));