MC_SEQ_RD_CTL_D1_LP 5901 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		*out_reg = MC_SEQ_RD_CTL_D1_LP;
MC_SEQ_RD_CTL_D1_LP 6009 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	WREG32(MC_SEQ_RD_CTL_D1_LP, RREG32(MC_SEQ_RD_CTL_D1));
MC_SEQ_RD_CTL_D1_LP 1877 drivers/gpu/drm/radeon/btc_dpm.c 		*out_reg = MC_SEQ_RD_CTL_D1_LP >> 2;
MC_SEQ_RD_CTL_D1_LP 2036 drivers/gpu/drm/radeon/btc_dpm.c 	WREG32(MC_SEQ_RD_CTL_D1_LP, RREG32(MC_SEQ_RD_CTL_D1));
MC_SEQ_RD_CTL_D1_LP 4446 drivers/gpu/drm/radeon/ci_dpm.c 		*out_reg = MC_SEQ_RD_CTL_D1_LP >> 2;
MC_SEQ_RD_CTL_D1_LP 4652 drivers/gpu/drm/radeon/ci_dpm.c 	WREG32(MC_SEQ_RD_CTL_D1_LP, RREG32(MC_SEQ_RD_CTL_D1));
MC_SEQ_RD_CTL_D1_LP  992 drivers/gpu/drm/radeon/cypress_dpm.c 	eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_RD_CTL_D1_LP >> 2;
MC_SEQ_RD_CTL_D1_LP 2789 drivers/gpu/drm/radeon/ni_dpm.c 		*out_reg = MC_SEQ_RD_CTL_D1_LP >> 2;
MC_SEQ_RD_CTL_D1_LP 2893 drivers/gpu/drm/radeon/ni_dpm.c 	WREG32(MC_SEQ_RD_CTL_D1_LP, RREG32(MC_SEQ_RD_CTL_D1));
MC_SEQ_RD_CTL_D1_LP 5447 drivers/gpu/drm/radeon/si_dpm.c 		*out_reg = MC_SEQ_RD_CTL_D1_LP >> 2;
MC_SEQ_RD_CTL_D1_LP 5555 drivers/gpu/drm/radeon/si_dpm.c 	WREG32(MC_SEQ_RD_CTL_D1_LP, RREG32(MC_SEQ_RD_CTL_D1));