MC_SEQ_PMG_CMD_MRS_LP 5840 drivers/gpu/drm/amd/amdgpu/si_dpm.c table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP; MC_SEQ_PMG_CMD_MRS_LP 5913 drivers/gpu/drm/amd/amdgpu/si_dpm.c *out_reg = MC_SEQ_PMG_CMD_MRS_LP; MC_SEQ_PMG_CMD_MRS_LP 6004 drivers/gpu/drm/amd/amdgpu/si_dpm.c WREG32(MC_SEQ_PMG_CMD_MRS_LP, RREG32(MC_PMG_CMD_MRS)); MC_SEQ_PMG_CMD_MRS_LP 1889 drivers/gpu/drm/radeon/btc_dpm.c *out_reg = MC_SEQ_PMG_CMD_MRS_LP >> 2; MC_SEQ_PMG_CMD_MRS_LP 1942 drivers/gpu/drm/radeon/btc_dpm.c table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2; MC_SEQ_PMG_CMD_MRS_LP 2040 drivers/gpu/drm/radeon/btc_dpm.c WREG32(MC_SEQ_PMG_CMD_MRS_LP, RREG32(MC_PMG_CMD_MRS)); MC_SEQ_PMG_CMD_MRS_LP 4361 drivers/gpu/drm/radeon/ci_dpm.c table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2; MC_SEQ_PMG_CMD_MRS_LP 4458 drivers/gpu/drm/radeon/ci_dpm.c *out_reg = MC_SEQ_PMG_CMD_MRS_LP >> 2; MC_SEQ_PMG_CMD_MRS_LP 4647 drivers/gpu/drm/radeon/ci_dpm.c WREG32(MC_SEQ_PMG_CMD_MRS_LP, RREG32(MC_PMG_CMD_MRS)); MC_SEQ_PMG_CMD_MRS_LP 1008 drivers/gpu/drm/radeon/cypress_dpm.c eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2; MC_SEQ_PMG_CMD_MRS_LP 2734 drivers/gpu/drm/radeon/ni_dpm.c table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2; MC_SEQ_PMG_CMD_MRS_LP 2801 drivers/gpu/drm/radeon/ni_dpm.c *out_reg = MC_SEQ_PMG_CMD_MRS_LP >> 2; MC_SEQ_PMG_CMD_MRS_LP 2888 drivers/gpu/drm/radeon/ni_dpm.c WREG32(MC_SEQ_PMG_CMD_MRS_LP, RREG32(MC_PMG_CMD_MRS)); MC_SEQ_PMG_CMD_MRS_LP 5381 drivers/gpu/drm/radeon/si_dpm.c table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2; MC_SEQ_PMG_CMD_MRS_LP 5459 drivers/gpu/drm/radeon/si_dpm.c *out_reg = MC_SEQ_PMG_CMD_MRS_LP >> 2; MC_SEQ_PMG_CMD_MRS_LP 5550 drivers/gpu/drm/radeon/si_dpm.c WREG32(MC_SEQ_PMG_CMD_MRS_LP, RREG32(MC_PMG_CMD_MRS));